Erase All (ERAL): The ERAL instruction programs every bit in the memory array to the Logic 1 state and is
primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought high
after being kept low for a minimum of 250ns (tCS). The ERAL instruction is valid only at
VCC = 5.0V 10%.
Figure 6-5.
ERAL Timing(1)
tCS
Standby
Check
Status
CS
SK
1
0
0
1
0
DI
tDF
High-impedance
tSV
High-impedance
DO
Busy
Ready
tWP
Note:
1. Valid only at VCC = 4.5V to 5.5V.
WRITE ALL (WRAL): The WRAL instruction programs all memory locations with the data patterns specified in
the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low
for a minimum of 250 ns (tCS). The WRAL instruction is valid only at VCC = 5.0V ±10%.
Figure 6-6.
WRAL Timing(1)
tCS
CS
SK
1
0
0
0
1
...
D
...
D0
N
DI
High-impedance
DO
Busy
Ready
tWP
Note:
1. Valid only at VCC = 4.5V to 5.5V.
AT93C46D Automotive [DATASHEET]
Atmel-8674C-SEEPROM-AT93C46D-Automotive-Datasheet_102014
9
MICROCHIP [ MICROCHIP ]
