Erase All (ERAL):
The ERAL instruction programs every bit in the memory array to the Logic 1 state and is
primarily used for testing purposes. The DO pin outputs the Ready/Busy status of the part if CS is brought high
after being kept low for a minimum of 250ns (t
CS
). The ERAL instruction is valid only at
V
CC
= 5.0V
10%.
Figure 6-5.
ERAL Timing
t
CS
Standby
CS
Check
Status
SK
DI
1
0
0
1
0
t
SV
t
DF
High-impedance
Ready
t
WP
DO
High-impedance
Busy
Note:
1.
Valid only at V
CC
= 4.5V to 5.5V.
WRITE ALL (WRAL):
The WRAL instruction programs all memory locations with the data patterns specified in
the instruction. The DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low
for a minimum of 250 ns (t
CS
). The WRAL instruction is valid only at V
CC
= 5.0V ±10%.
Figure 6-6.
WRAL Timing
t
CS
CS
SK
DI
1
0
0
0
1
...
DN
...
D0
DO
High-impedance
Busy
t
WP
Ready
Note:
1.
Valid only at V
CC
= 4.5V to 5.5V.
AT93C46D Automotive [DATASHEET]
Atmel-8674C-SEEPROM-AT93C46D-Automotive-Datasheet_102014
9
MICROCHIP [ MICROCHIP TECHNOLOGY ]
