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AT93C46DN-SH-T-989 参数 Datasheet PDF下载

AT93C46DN-SH-T-989图片预览
型号: AT93C46DN-SH-T-989
PDF下载: 下载PDF文件 查看货源
内容描述: [EEPROM, 64X16, Serial, CMOS, PDSO8]
分类和应用: 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
文件页数/大小: 17 页 / 708 K
品牌: MICROCHIP [ MICROCHIP TECHNOLOGY ]
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ERASE:
The Erase instruction programs all of the bits in the specified memory location to the Logic 1 state. The
self-timed erase cycle starts once the ERASE instruction and address are decoded. The DO pin outputs the
Ready/Busy status of the part if CS is brought high after being kept low for a minimum of 250ns (t
CS
). A Logic 1
at the DO pin indicates that the selected memory location has been erased, and the part is ready for another
instruction.
Figure 6-3.
ERASE Timing
t
CS
CS
Check
Status
Standby
SK
DI
1
1
1
A
N
A
N-1
A
N-2
...
A0
t
SV
t
DF
High-impedance
Ready
t
WP
DO
High-impedance
Busy
WRITE:
The WRITE instruction contains the 8 or 16 bits of data to be written into the specified memory location.
The self-timed programming cycle, t
WP
, starts after the last bit of data is received at serial data input pin DI. The
DO pin outputs the Ready/Busy status of the part if CS is brought high after being kept low for a minimum of
250ns (t
CS
). A Logic 0 at DO indicates that programming is still in progress. A Logic 1 indicates that the memory
location at the specified address has been written with the data pattern contained in the instruction and the part
is ready for further instructions.
A Ready/Busy status cannot be obtained if the CS is brought high after the end
of the self-timed programming cycle, t
WP
.
Figure 6-4.
Write Timing
CS
t
CS
SK
DI
1
0
1
AN
...
A0
DN
...
D0
DO
High-impedance
Busy
t
WP
Ready
8
AT93C46D Automotive [DATASHEET]
Atmel-8674C-SEEPROM-AT93C46D-Automotive-Datasheet_102014