AT25128B/AT25256B
Read Sequence
7.
Read Sequence
Reading the AT25128B/AT25256B via the SO pin requires the following sequence. After the CS line is
pulled low to select a device, the READ(03h) instruction is transmitted via the SI line followed by the
16‑bit address to be read. Refer to Table 7-1 for the address bits for AT25128B/AT25256B.
Table 7-1.ꢀAT25128B/AT25256B Address Bits
Address
AN
AT25128B
A13–A0
AT25256B
A14–A0
A15
Don’t Care Bits
A15–A14
Upon completion of the 16‑bit address, any data on the SI line will be ignored. The data (D7‑D0) at the
specified address is then shifted out onto the SO line. If only one byte is to be read, the CS line should be
driven high after the data comes out. The read sequence can be continued since the byte address is
automatically incremented and data will continue to be shifted out. When the highest‑order address bit is
reached, the address counter will rollover to the lowest‑order address bit allowing the entire memory to be
read in one continuous read cycle regardless of the starting address.
Figure 7-1.ꢀRead Waveform
CS
0
1
2
3
4
5
6
7
8
9
10 11 12
19 20 21 22 23 24 25 26 27 28 29 30 31
SCK
SI
READ Opcode (03h)
Address Bits A15-A0
0
0
0
0
0
0
1
1
A
A
A
A
A
A
A
A
A
MSB
MSB
Data Byte 1
High-Impedance
D
D
D
D
D
D
D
D
D
D
SO
MSB
MSB
DS20006193A-page 23
© 2019 Microchip Technology Inc.
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