PIC12CE67X
FIGURE 3-1: PIC12CE67X BLOCK DIAGRAM
Device
Program Memory Data Memory (RAM) Non-Volatile Memory (EEPROM)
PIC12CE673
PIC12CE674
1K x 14
2K x 14
128 x 8
128 x 8
16 x 8
16 x 8
13
8
GPIO
Data Bus
Program Counter
GP0/AN0
GP1/AN1/VREF
GP2/T0CKI/AN2/INT
GP3/MCLR/Vpp
GP4/OSC2/AN3/CLKOUT
EPROM
Program
Memory
RAM
8 Level Stack
(13 bit)
128 bytes
File
Registers
GP5/OSC1/CLKIN
Program
Bus
14
RAM Addr (1)
9
Addr MUX
Instruction reg
Indirect
Addr
7
Direct Addr
8
16x8
EEPROM
Data
FSR reg
Memory
STATUS reg
8
3
MUX
Power-up
Timer
Instruction
Decode &
Control
Oscillator
Start-up Timer
ALU
Watchdog
Timer
8
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
Power-on
Reset
W reg
Internal
4 MHz Clock
Timer0
MCLR
VDD, VSS
A/D
Note 1: Higher order bits are from the STATUS register.
DS40181B-page 8
Preliminary
1998 Microchip Technology Inc.
MICROCHIP [ MICROCHIP ]
