KSZ8795CLX
4.8
ACL Rule Table and ACL Indirect Registers
4.8.1
ACL REGISTER AND PROGRAMMING MODEL
The ACL registers are accessible by the microcontroller through a serial interface. The per-port register set is accessed
through indirect addressing mechanism. The ACL entries are stored in the format shown in the following figure. Each
ACL rule list table can input up to 16 entries per port, with a total of five ACL rule list tables that can be set for five ports.
FIGURE 4-2:
ACL TABLE ACCESS
To update any port-based ACL registers, it is suggested to execute a read modify write sequence for each 128-bit (112
are used) entry addressed by the Indirect Address Register to ensure the integrity of control content. Minimum two indi-
rect control writes and two indirect control reads are needed for each ACL entry read access (indirect data read shall
follow), and minimum one indirect control read and three indirect control writes are required for each ACL entry write
access. Each 112-bit port-based ACL word entry (ACL Word) is accomplished through a sequence of the Indirect
Access Control 0 Registers 110 (0x6E) accesses by specifying the Bits[3:0] 4-bit port number (Indirect address [11:8])
and 8-bit indirect register address (indirect address[7:0]) in the Indirect Access Control 1 Register 111 (0x6F). The
address numbers 0x00-0x0d are used to specify the byte location of each entry (see above figure), address 0x00 indi-
cates the byte 15 (MSB) of each 128-bit entry, address 0x01 indicates the byte 14 etc., bytes at address 0x0E and 0x0F
are reserved for the future. Address 0x10 and 0x11 hold bit-wise Byte Enable for each entry. Address 0x12 is used as
control and status register. The format of these registers is defined in the ACL Indirect Registers sub-section.
4.8.2
ACL INDIRECT REGISTERS
Table 4-21 is used to implement ACL mode selection and filtering on a per-port basis.
DS00002112A-page 86
2016 Microchip Technology Inc.
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