KSZ8795CLX
Read Register 115 (47:40)
Read Register 116 (39:32)
Read Register 117 (31:24)
Read Register 118 (23:16)
Read Register 119 (15:8)
Read Register 120 (7:0)
2. Dynamic MAC Address Table Read (read the 257th entry), without retrieving number of entries information
Write to Register 110 with 0x19 (read dynamic table selected)
Write to Register 111 with 0x1 (trigger the read operation) and then
Read Register 112 (71:64)
Read Register 113 (63:56)
Read Register 114 (55:48) // if Bit[55] is 1, restart (reread) from this register
Read Register 115 (47:40)
Read Register 116 (39:32)
Read Register 117 (31:24)
Read Register 118 (23:16)
Read Register 119 (15:8)
Read Register 120 (7:0)
4.7
PME Indirect Registers
The PME registers are provided on a global and per-port basis. These registers are read/write using indirect memory
access, as shown in Table 4-20.
TABLE 4-20: PME INDIRECT REGISTERS
Address
Name
Description
Mode
Default
Global PME Control Register
Reg. 110 (0x6E) Bits[7:5] =100 for PME, Reg.110 Bits[3:0] = 0x0 for the indirect global register,
Reg. 111 (0x6F) Bits[7:0] = Offset to access the Indirect Byte Register 0xA0.
Offset: 0x00 (Bits[31:24]), 0x01 (Bits[23:16]), 0x02 (Bit[15:8]), 0x03 (Bits[7:0]).
Location: (100 PME) -> {0x0, offset} -> 0xA0 holds the data.
31 - 2
Reserved
PME Output 1= PME output pin is enabled.
Enable 0= PME output pin is disabled.
PME Output 1= PME output pin is active-high.
Polarity 0= PME output pin is active-low.
Port PME Control Status Register
—
RO
All ‘0’
0
1
R/W
0
R/W
0
Reg. 110 (0x6E) Bits[7:5] =100 for PME, Reg. 110 Bits[3:0] = 0xn for the Indirect Port Register (n = 1,2,3,4).
Reg. 111 (0x6F) Bits[7:0] = Offset to access the Indirect Byte Register 0xA0.
Offset: 0x00 (Bits[31:24]), 0x01 (bits [23:16]), 0x02 (Bits[5:8]), 0x03 (Bits[7:0]).
Location: (100 PME) -> {0xn, offset} -> 0xA0 holds the data.
31 - 3
2
Reserved
—
RO
All ‘0’
0
MagicPacket 1 = Magic packet is detected at any port (write 1 to
R/W
Detect
clear).
W1C
0 = No magic packet is detected.
1
0
Link-Up
Detect
1 = Link up is detected at any port (write 1 to clear).
0 = No link-up is detected.
R/W
W1C
0
0
Energy
Detect
1 = Energy is detected at any port (write 1 to clear).
0 = No energy is detected.
R/W
W1C
DS00002112A-page 84
2016 Microchip Technology Inc.
MICREL [ MICREL SEMICONDUCTOR ]
