KSZ8795CLX
TABLE 4-18: VLAN ID AND INDIRECT REGISTERS (CONTINUED)
Indirect Address
High/Low Bit[9-0]
for VLAN Sets
Indirect Data
Registers Bits for
Each VLAN Entry
VID Bit[12-2] in
VID Bit[1-0] in
VLAN Tag
VID Numbers
VLAN Tag
2
Bits[28:16]
Bits[44:32]
Bits[60:48]
:
9
10
2
1
2
3
:
2
2
2
:
11
2
:
:
:
:
:
:
:
:
:
:
:
:
1023
1023
1023
1023
Bits[12:0]
Bits[28:16]
Bits[44:32]
Bits[60:48]
4092
4093
4095
4095
1023
1023
1023
1023
0
1
2
3
4.6
Dynamic MAC Address Table
Table 4-19 is read-only.
TABLE 4-19: DYNAMIC MAC ADDRESS TABLE
Address Name Description
Format of Dynamic MAC Address Table (1K entries)
Mode
Default
71
MAC Empty 1 = There is no valid entry in the table.
0 = There are valid entries in the table.
RO
RO
1
0
70 - 61
No. of Valid Indicates how many valid entries in the table.
Entries
0x3ff means 1K entries
0x1 and Bit[71] = 0: means 2 entries
0x0 and Bit[71]= 0: means 1 entry
0x0 and Bit[71] = 1: means 0 entry
60 - 59
58 - 56
Time Stamp 2-bit counters for internal aging
RO
RO
—
Source Port The source port where FID+MAC is learned.
0x0
000 = Port 1
001 = Port 2
010 = Port 3
011 = Port 4
100 = Port 5
55
Data Ready 1 = The entry is not ready, retry until
this bit is set to 0.
RO
—
0 = The entry is ready.
54 - 48
47 - 0
FID
Filter ID
RO
RO
0x0
0x0
MAC
48-bit MAC address
Address
Examples:
1. Dynamic MAC Address Table Read (read the 1st entry), and retrieve the MAC table size
Write to Register 110 with 0x18 (read dynamic table selected)
Write to Register 111 with 0x0 (trigger the read operation) and then
Read Register 112 (71:64)
Read Register 113 (63:56); // the above two registers show # of entries
Read Register 114 (55:48) // if Bit[55] is 1, restart (reread) from this register
2016 Microchip Technology Inc.
DS00002112A-page 83
MICREL [ MICREL SEMICONDUCTOR ]
