KSZ8795CLX
TABLE 4-13: ADDITIONAL ADVANCED CONTROL REGISTERS (Note 4-1) (CONTINUED)
Address
Name
Description
Mode
Default
Register 179 (0xB3): Port 1 Control 15
Register 195 (0xC3): Port 2 Control 15
Register 211 (0xD3): Port 3 Control 15
Register 227 (0xE3): Port 4 Control 15
Register 243 (0xF3): Port 5 Control 15
7
Enable Port 0 = Strict priority, will transmit all the packets from
R/W
R/W
1
Transmit
Queue 2
Ratio
this priority queue 2 before transmit lower priority
queue.
1 = Bits[6:0] reflect the packet number allow to
transmit from this priority queue 1 within a certain
time.
6 - 0
Port Trans- Packet number for Transmit Queue 2 for high/low
mit Queue 2 priority packets in high/low priority packets in four
0000100
Ratio[6:0]
queues mode.
Register 180 (0xB4): Port 1 Control 16
Register 196 (0xC4): Port 2 Control 16
Register 212 (0xD4): Port 3 Control 16
Register 228 (0xE4): Port 4 Control 16
Register 244 (0xF4): Port 5 Control 16
7
Enable Port 0 = Strict priority, will transmit all the packets from
R/W
R/W
1
Transmit
Queue 1
Rate
this priority queue 1 before transmit lower priority
queue.
1 = Bits[6:0] reflect the packet number allow to
transmit from this priority queue 1 within a certain
time.
6 - 0
Port Trans- Packet number for Transmit Queue 1 for low-/high-
mit Queue 1 priority packets in four queues mode and high-pri-
0000010
Ratio[6:0]
ority packets in two queues mode.
Register 181 (0xB5): Port 1 Control 17
Register 197 (0xC5): Port 2 Control 17
Register 213 (0xD5): Port 3 Control 17
Register 229 (0xE5): Port 4 Control 17
Register 245 (0xF5): Port 5 Control 17
7
Enable Port 0 = Strict priority, will transmit all the packets from
R/W
R/W
1
Transmit
Queue 0
Rate
this priority queue 0 before transmit lower priority
queue.
1 = Bits[6:0] reflect the packet number allow to
transmit from this priority queue 0 within a certain
time.
6 - 0
Port Trans- Packet number for Transmit Queue 0 for lowest pri-
mit Queue 0 ority packets in four queues mode and low priority
0000001
Ratio[6:0]
packets in two queues mode.
Register 182 (0xB6): Port 1 Rate Limit Control
Register 198 (0xC6): Port 2 Rate Limit Control
Register 214 (0xD6): Port 3 Rate Limit Control
Register 230 (0xE6): Port 4 Rate Limit Control
Register 246 (0xF6): Port 5 Rate Limit Control
7
6
Reserved
—
RO
0
0
Ingress Limit 1 = Ingress rate limit is port based
Port/Priority 0 = Ingress rate limit is priority based
Based Select
R/W
2016 Microchip Technology Inc.
DS00002112A-page 75
MICREL [ MICREL SEMICONDUCTOR ]
