KSZ8795CLX
TABLE 3-8:
PORT 5 SW5-MII CONNECTION
MAC-to-MAC Connection
MAC-to-PHY Connection
KSZ8795CLX SW5-MII PHY Mode
KSZ8795CLX
KSZ8795CLX SW5-MII PHY Mode
Description
KSZ8795CLX
External MAC
SW5-MII
Signals
Type
External PHY
SW5-MII
Signals
Type
MTXEN
TXEN5
Input
Transmit
Enable
MTXEN
RXDV5
Output
MTXER
TXER5
Input
Input
Transmit Error
MTXER
RXER5
Output
Output
MTXD[3:0]
TXD5[3:0]
Transmit Data
Bit[3:0]
MTXD[3:0]
RXD5[3:0]
MTXC
MCOL
TXC5
COL5
Output
Output
Transmit Clock
MTXC
MCOL
RXC5
COL5
Input
Input
Collision
Detection
MCRS
CRS5
Output
Output
Carrier Sense
MCRS
CRS5
Input
Input
MRXDV
RXDV5
Receive Data
Valid
MRXDV
TXEN5
MRXER
RXER5
Output
Output
Receive Error
MRXER
TXER5
Input
Input
MRXD[3:0]
RXD5[3:0]
Receive Data
Bit[3:0]
MRXD[3:0]
TXD5[3:0]
MRXC
RXC5
Output
Receive Clock
MRXC
TXC5
Input
The MII interface operates in either MAC mode or PHY mode. These interfaces are nibble-wide data interfaces, so they
run at one-quarter the network bit rate (not encoded). Additional signals on the transmit side indicate when data is valid
or when an error occurs during transmission. Likewise, the receive side has indicators that convey when the data is valid
and without physical layer errors. For half-duplex operation, there is a COL signal that indicates a collision has occurred
during transmission.
Note: Normally MRXER would indicate a receive error coming from the physical layer device. MTXER would indicate a
transmit error from the MAC device. These signals are not appropriate for this configuration. For PHY mode operation
with an external MAC, if the device interfacing with the KSZ8795CLX has an MRXER pin, it can be tied low. For MAC
mode operation with an external PHY, if the device interfacing with the KSZ8795CLX has an MTXER pin, it can be tied
low.
3.5.2.5
Port 5 GMAC5 SW5-GMII Interface
Table 3-9 shows two GMII connection methods when connected to an external GMAC or GPHY.
• The first is an external GMAC connecting in SW5-GMII GPHY mode.
• The second is an external GPHY connecting in SW5-GMII GMAC mode.
The GMAC mode or GPHY mode setting is determined by the strap Pin 62 LED2_1.
TABLE 3-9:
PORT 5 SW5-GMII CONNECTION
GMAC-to-GMAC Connection
GMAC-to-GPHY Connection
KSZ8795CLX SW5-GMII GPHY Mode
KSZ8795CLX SW5-GMII GMAC Mode
Description
KSZ8795CLX
External
GMAC
KSZ8795CLX
External
GPHY
SW5-GMII
Signals
Type
SW5-GMII
Signals
Type
MRXDV
TXEN5
Input
Transmit
Enable
MTXEN
RXDV5
Output
MRXER
TXER5
Input
Input
Transmit Error
MTXER
RXER5
Output
Output
MRXD[7:0]
TXD5[7:0]
Transmit Data
Bits[7:0]
MTXD[7:0]
RXD5[7:0]
MGRXC
GTXC5
Input
Transmit Clock
MGTXC
GRXC5
Output
DS00002112A-page 30
2016 Microchip Technology Inc.
MICREL [ MICREL SEMICONDUCTOR ]
