KSZ8795CLX
TABLE 2-2:
Pin Number
STRAP-IN OPTIONS - KSZ8795CLX
Type
Pin Name
Description
(Note 2-2)
Switch Port 5 GMAC5 Interface Mode Select:
Strap Option:
00 = MII for SW5-MII
01 = RMII for SW5-RMII
24, 25
LED3[1,0]
Ipu/O
10 = GMII for SW5-GMII
11 = RGMII for SW5-RGMII (Default)
Port 5 GMII/MII and RMII Mode Select:
Strap Option:
When Port 5 is GMII/MII mode:
PU = GMII/MII is in GMAC/MAC mode. (Default)
PD = GMII/MII is in GPHY/PHY mode.
Note: When set GMAC5 GMII to GPHY mode, the CRS and COL
pins will change from the input to output. When set MII to PHY mode,
the CRS, COL, RXC and TXC pins will change from the input to out-
put.
62
LED2_1
Ipu/O
When Port 5 is RMII mode:
PU = Clock mode in RMII, using 25 MHz OSC clock and provide
50 MHz RMII clock from pin RXC5.
PD = Normal mode in RMII, the TXC5/REFCLKI5 pin on the Port 5
RMII will receive an external 50 MHz clock
Note: Port 5 also can use either an internal or external clock in RMII
mode based on this strap pin or the setting of the Register 86 (0x56)
bit[7].
63
64
LED2_0
LED1_1
Ipu/O
Ipu/O
REFCLKO Enable:
Strap Option:
PU = REFCLK_O (25 MHz) is enabled. (Default)
PD = REFCLK_O is disabled.
PLL Clock Source Select:
Strap Option:
PU = Still use 25 MHz clock from XI/XO pin even though it is in Port
5 RMII normal mode.
PD = Use external clock from TXC5 pin in Port 5 RMII normal mode.
Note: If received clock in Port 5 RMII normal mode with bigger clock
jitter, still can select to use the 25 MHz crystal/oscillator as switch’s
clock source.
65
66
LED1_0
SPIQ
Ipu/O
Ipd/O
Port 5 Gigabit Select:
Strap Option:
PU = 1Gbps in GMII/RGMII mode (Default)
PD = 10/100 Mbps in GMII/RGMII mode.
Note: Programmable through internal register also
Serial Bus Configuration
Strap Option:
PD = SPI slave mode. (Default)
PU = MDC/MDIO mode.
Note: An external pull-up or pull-down resistor is requested. If the
uplink port is used for the RGMII interface, SPI mode is recommend
for setting register 86 (0x56) bits [4:3] for RGMII v2.0; MDC/MDIO
mode can’t set this feature.
Note 2-2
Ipd/O = Input w/internal pull-down during reset, output pin otherwise.
Ipu/O = Input w/internal pull-up during reset, output pin otherwise.
DS00002112A-page 12
2016 Microchip Technology Inc.
MICREL [ MICREL SEMICONDUCTOR ]
