W3H32M64EA-XSBX
ADVANCED
BGA THERMAL RESISTANCE
Description
Symbol
Theta JA
Theta JB
Theta JC
Typical
19.7
Units
°C/W
°C/W
°C/W
Notes
Junction to Ambient (No Airflow)
Junction to Ball
1
1
1
20.6
Junction to Case (Top)
10.8
Note: These typical thermal resistances are for each DRAM die, if using the total power of the MCP, divide the given values by 4.
Refer to "PBGA Thermal Resistance Correlation" (Application Note) at www.whiteedc.com in the application notes section for modeling conditions.
INPUT DC LOGIC LEVEL
All voltages referenced to VSS
Parameter
Symbol
VIH(DC)
VIL(DC)
Min
VREF + 0.1 25
-0.300
Max
Unit
V
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
VCC + 0.300
VREF - 0.125
V
INPUT AC LOGIC LEVEL
All voltages referenced to VSS
Parameter
Symbol
VIH(AC)
VIH(AC)
VIL(AC)
VIL(AC)
Min
Max
—
Unit
V
AC Input High (Logic 1) Voltage DDR2-400 & DDR2-533
AC Input High (Logic 1) Voltage DDR2-667
AC Input Low (Logic 0) Voltage DDR2-400 & DDR2-533
AC Input Low (Logic 0) Voltage DDR2-667
VREF + 0.250
VREF + 0.200
—
V
—
—
VREF - 0.250
VREF - 0.200
V
V
ODT DC ELECTRICAL CHARACTERISTICS
All voltages referenced to VSS
Parameter
Symbol
RTT1(EFF)
RTT2(EFF)
RTT3(EFF)
∆VM
Min
52
Nom
75
Max
97
Unit
Ω
Notes
R
TT effective impedance value for 75Ω setting EMR (A6, A2) = 0, 1
TT effective impedance value for 150Ω setting EMR (A6, A2) = 1, 0
1
1
1
2
R
105
35
150
50
195
65
Ω
RTT effective impedance value for 50Ω setting EMR (A6, A2) = 1, 1
Ω
Deviation of VM with respect to VCCQ/2
-6
6
%
Note: 1. RTT1(EFF) and RTT2(EFF) are determined by separately applying VIH(AC) and VIL (AC) to the ball being tested, and then measuring current, I(VIH(AC)), and I(VIL(AC)), respectively.
RTT(EFF) = VIH(AC) - VIL(AC)
I(VIH(AC)) - I(VIL(AC)
)
2. Measure voltage (VM) at tested ball with no load
∆VM =
(
2 x VM - 1
VCC
)
x 100
Microsemi Corporation reserves the right to change products or specifications without notice.
August 2011 © 2011 Microsemi Corporation. All rights reserved.
Rev.1
21
Microsemi Corporation • (602) 437-1520 • www.microsemi.com