W3H32M64EA-XSBX
ADVANCED
TABLE 12 – AC TIMING PARAMETERS (continued)
-55°C ≤ TA ≤ +125°C; VCCQ = + 1.8V ± 0.1V, VCC = +1.8V ± 0.1V
667Mbs CL5
533Mbs CL4
400Mbs CL3
Unit
Parameter
Address and control input pulse width for each input
Symbol
Min
Max
Min
Max
Min
Max
tIPW
tISa
0.6
0.6
0.6
tCK
ps
ps
ps
ps
tCK
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
tCK
ns
ns
400
500
600
Address and control input setup time
Address and control input hold time
tISb
200
250
350
tIHa
400
500
600
tIHb
275
375
475
CAS# to CAS# command delay
tCCD
tRC
2
2
2
ACTIVE to ACTIVE (same bank) command
ACTIVE bank a to ACTIVE bank b command
ACTIVE to READ or WRITE delay
55
55
55
tRRD
tRCD
tFAW
tRAS
tRTP
tWR
10
10
10
15
15
15
Four Bank Activate period
50
40
50
40
50
ACTIVE to PRECHARGE command
Internal READ to precharge command delay
Write recovery time
70,000
70,000
40
7.5
70,000
7.5
7.5
15
15
15
Auto precharge write recovery + precharge time
Internal WRITE to READ command delay
PRECHARGE command period
tDAL
tWTR
tRP
tWR + tRP
7.5
tWR + tRP
7.5
tWR + tRP
10
15
15
15
PRECHARGE ALL command period
LOAD MODE command cycle time
CKE low to CK, CK# uncertainty
tRPA
tMRD
tDELAY
tRFC
tRP + tCK
2
tRP + tCK
2
tRP + tCK
2
tIS +tIH + tCK
105
tIS +tIH + tCK
105
tIS +tIH + tCK
105
REFRESH to Active or Refresh to Refresh command interval
70,000
7.8
70,000
7.8
70,000
7.8
Average periodic refresh interval (Comm + Ind Temp)
tREFI
μs
Average periodic refresh interval (Military Temp)
Exit self refresh to non-READ command
Exit self refresh to READ
tREFI
tXSNR
tXSRD
1.95
1.95
1.95
μs
ns
tRFC(MIN)
10
+
t
RFC(MIN) + 10
200
tRFC(MIN) + 10
200
200
tCK
Exit self refresh timing reference
tlSXR
tIS
tIS
tIS
ps
ODT tum-on delay
ODT turn-on
tAOND
tACN
tAOFD
tAOF
2
2
2
2
2
2
tCK
ps
tCK
ps
tAC(MAX)
1000
+
tAC(MAX)
1000
+
tAC(MAX)
1000
+
tAC(MIN)
2.5
tAC(MIN)
2.5
tAC(MIN)
2.5
ODT turn-off delay
ODT tum-off
2.5
2.5
2.5
tAC(MAX)
600
+
tAC(MAX)
600
+
tAC(MAX)
600
+
tAC(MIN)
tAC(MIN)
tAC(MIN)
2 x tCK
tAC(MAX)
1000
+
2 x tCK
tAC(MAX)
1000
+
2 x tCK
tAC(MAX)
1000
+
tAC(MIN)
2000
+
tAC(MIN)
2000
+
+
tAC(MIN)
2000
+
+
ODT tum-on (power-down mode)
ODT turn-off (power-down mode)
tAONPD
+
+
+
ps
ps
2 x tCK
tAC(MAX)
1000
+
+
2.5 x tCK
tAC(MAX)
1000
+
+
2.5 x tCK
tAC(MAX)
1000
+
+
tAC(MIN)
2000
+
tAC(MIN)
2000
tAC(MIN)
2000
tAOFPD
ODT to power-down entry latency
tANPD
tAXPD
tXARD
tXARDS
tXP
3
8
3
8
3
8
tCK
tCK
tCK
tCK
tCK
tCK
ODT power-down exit latency
Exit active power-down to READ command, MR[bit12=0]
Exit active power-down to READ command, MR[bit12=1]
Exit precharge power-down to any non-READ command
CKE minimum high/low time
2
2
2
7-AL
2
6-AL
2
6-AL
2
tCKE
3
3
3
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August 2011 © 2011 Microsemi Corporation. All rights reserved.
Rev.1
24
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