W3E32M64S-XBX
White Electronic Designs
DC Electrical Characteristics And Operating Conditions (Notes 1, 6)
VCC = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
Symbol
Min
2.3
2.3
-2
Max
2.7
2.7
2
Units
V
Supply Voltage
VCC
VCCQ
II
I/O Supply Voltage
V
Input Leakage Current: Any input 0V ≤ VIN ≤ VCC (All other pins not under test = 0V)
Input Leakage Address Current (All other pins not under test = 0V)
Output Leakage Current: I/Os are disabled; 0V ≤ VOUT ≤ VCC
μA
μA
μA
II
-8
8
IOZ
-5
5
Output Levels: Full drive option
High Current (VOUT = VCCQ - 0.373V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.373V, maximum VREF, maximum VTT)
IOH
IOL
IOHR
IOLR
-16.8
16.8
-9
–
–
–
–
mA
mA
mA
mA
Output Levels: Reduced drive option
High Current (VOUT = VCCQ - 0.763V, minimum VREF, minimum VTT)
Low Current (VOUT = 0.763V, maximum VREF, maximum VTT)
9
I/O Reference Voltage
I/O Termination Voltage
VREF
VTT
0.49 x VCCQ
VREF - 0.04
0.51 x VCCQ
VREF + 0.04
V
V
AC INPUT OPERATING CONDITIONS
VCC, VCCQ = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
Parameter/Condition
Input High (Logic 1) Voltage
Input Low (Logic 0) Voltage
Symbol
VIH
Min
VREF + 0.5
Max
-
Units
V
VIL
-
VREF - 0.5
V
ICC SPECIFICATIONS AND CONDITIONS (NOTES 1-5, 10, 12, 14)
VCC, = +2.5V ± 0.2V; -55°C ≤ TA ≤ +125°C
MAX
250Mbs
Symbol 333Mbs 266Mbs 200Mbs Units
Parameter/Condition
OPERATING CURRENT: One bank; Active-Precharge; tRC = tRC (MIN); tCK = tCK (MIN); DQ, DM, and DQS inputs
changing once per clock cycle; Address and control inputs changing once every two clock cycles; (22, 48)
ICC0
520
640
20
520
640
20
460
580
20
mA
mA
mA
mA
mA
mA
OPERATING CURRENT: One bank; Active-Read-Precharge; Burst = 2; tRC = tRC (MIN); tCK = tCK (MIN); IOUT = 0mA;
Address and control inputs changing once per clock cycle (22, 48)
ICC1
PRECHARGE POWER-DOWN STANDBY CURRENT: All banks idle; Power-down mode; tCK = tCK (MIN); CKE =
LOW; (23, 32, 50)
ICC2P
ICC2F
ICC3P
ICC3N
IDLE STANDBY CURRENT: CS# = HIGH; All banks idle; tCK = tCK (MIN); CKE = HIGH; Address and other control
inputs changing once per clock cycle. VIN = VREF for DQ, DQS, and DM (51)
180
140
200
180
140
200
160
120
180
ACTIVE POWER-DOWN STANDBY CURRENT: One bank active; Power-down mode; tCK = tCK (MIN); CKE = LOW
(23, 32, 50)
ACTIVE STANDBY CURRENT: CS# = HIGH; CKE = HIGH; One bank; Active-Precharge; tRC = tRAS (MAX); tCK = tCK
(MIN); DQ, DM, and DQS inputs changing twice per clock cycle; Address and other control inputs changing once per
clock cycle (22)
OPERATING CURRENT: Burst = 2; Reads; Continuous burst; One bank active; Address and control inputs changing
once per clock cycle; tCK = tCK (MIN); IOUT = 0mA (22, 48)
ICC4R
ICC4W
660
975
660
800
580
540
mA
mA
OPERATING CURRENT: Burst = 2; Writes; Continuous burst; One bank active; Address and control inputs changing
once per clock cycle; tCK = tCK (MIN); DQ, DM, and DQS inputs changing twice per clock cycle (22)
AUTO REFRESH CURRENT
tREF = tRC (MIN) (27, 50)
REF = 7.8125μs (27, 50)
Standard (11)
ICC5
ICC5A
ICC6
1,160
40
1,160
40
1,120
40
mA
mA
mA
mA
t
SELF REFRESH CURRENT: CKE ≤ 0.2V
20
20
20
OPERATING CURRENT: Four bank interleaving READs (BL=4) with auto precharge, tRC =tRC (MIN); tCK = tCK (MIN);
Address and control inputs change only during Active READ or WRITE commands. (22, 49)
ICC7
2,025
1,620
1,400
February 2007
Rev. 4
11
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com