W3E32M64S-XBX
White Electronic Designs
REFRESH command is initiated like an AUTO REFRESH
command except CKE is disabled (LOW). The DLL is
automatically disabled upon entering SELF REFRESH
and is automatically enabled upon exiting SELF REFRESH
(200 clock cycles must then occur before a READ
command can be issued). Input signals except CKE are
“Don’t Care” during SELF REFRESH. VREF voltage is also
required for the full duration of SELF REFRESH.
to CKE going back HIGH. Once CKE is HIGH, the DDR
SDRAM must have NOP commands issued for tXSNR
because time is required for the completion of any internal
refresh in progress.
,
A simple algorithm for meeting both refresh and DLL
requirements is to apply NOPs for tXSNR time, then a DLL
Reset and NOPs for 200 additional clock cycles before
applying any other command.
The procedure for exiting self refresh requires a sequence
of commands. First, CK and CK# must be stable prior
* Self refresh available in commercial and industrial temperatures only.
ABSOLUTE MAXIMUM RATINGS
Parameter
Unit
Voltage on VCC, VCCQ Supply relative to Vss
Voltage on I/O pins relative to VSS
Operating Temperature TA (Mil)
Operating Temperature TA (Ind)
Storage Temperature, Plastic
-1 to 3.6
-1 to 3.6
V
V
-55 to +125
-40 to +85
-55 to +125
°C
°C
°C
NOTE: Stress greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of
the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
CAPACITANCE (NOTE 13)
Parameter
Symbol
CI1
Max
8
Unit
pF
Input Capacitance: CLK
Addresses, BA0-1 Input Capacitance
Input Capacitance: All other input-only pins
Input/Output Capacitance: I/Os
CA
22
10
10
pF
CI2
pF
CIO
pF
BGA THERMAL RESISTANCE
Description
Symbol
Theta JA
Theta JB
Theta JC
Max
14.1
10.0
5.2
Units
°C/W
°C/W
°C/W
Notes
Junction to Ambient (No Airflow)
Junction to Ball
1
1
1
Junction to Case (Top)
NOTE 1: Refer to "PBGA Thermal Resistance Correlation" Application Note at www.whiteedc.com in the application notes section for modeling conditions.
February 2007
Rev. 4
10
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
