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W3E32M64S-250BM 参数 Datasheet PDF下载

W3E32M64S-250BM图片预览
型号: W3E32M64S-250BM
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 32MX64, 0.8ns, CMOS, PBGA219, 25 X 25 MM, PLASTIC, BGA-219]
分类和应用: 时钟动态存储器双倍数据速率内存集成电路
文件页数/大小: 17 页 / 847 K
品牌: MERCURY [ MERCURY UNITED ELECTRONICS INC ]
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W3E32M64S-XBX  
White Electronic Designs  
FIGURE 4 – CAS LATENCY  
FIGURE 5 – EXTENDED MODE  
REGISTER DEFINITION  
T0  
T1  
T2  
T2n  
T3  
T3n  
A
10  
A
9
A8  
A7  
A6  
A
5
A4  
A3  
A
2
A
1
A0  
BA  
1
BA0  
A12  
A
11  
Address Bus  
CLK  
CLK  
COMMAND  
READ  
NOP  
NOP  
NOP  
Extended Mode  
Register (Ex)  
1
1
1
0
DS DLL  
Operating Mode  
CL = 2  
DQS  
DQ  
E0  
DLL  
0
1
Enable  
Disable  
T0  
T1  
T2  
T2n  
T3  
T3n  
CLK  
CLK  
E1  
0
Drive Strength  
Normal  
COMMAND  
READ  
NOP  
NOP  
NOP  
1
Reduced  
CL = 2.5  
DQS  
DQ  
E2  
0
E1, E0  
Valid  
-
Operating Mode  
Reserved  
E12 E11 E10 E9 E8 E7 E6 E5 E4 E3  
0
0
0
0
0
0
0
0
0
0
Burst Length = 4 in the cases shown  
Shown with nominal tAC and nominal tDSDQ  
-
Reserved  
-
-
-
-
-
-
-
-
-
-
1. E14 and E13 must be "0, 1" to select the Extended Mode Register (vs. the base Mode Register)  
2. The QFC function is not supported.  
DATA  
DON'T CARE  
TRANSITIONING DATA  
allowed as long as it does not interrupt the data transfer  
in the current bank and does not violate any other timing  
parameters. Input A10 determines whether one or all  
banks are to be precharged, and in the case where only  
one bank is to be precharged, inputs BA0, BA1 select the  
bank. Otherwise BA0, BA1 are treated as “Don’t Care.”  
Once a bank has been precharged, it is in the idle state and  
must be activated prior to any READ or WRITE commands  
being issued to that bank. A PRECHARGE command will  
be treated as a NOP if there is no open row in that bank  
(idle state), or if the previously open row is already in the  
process of precharging.  
upon completion of the READ or WRITE burst. AUTO  
PRECHARGE is non persistent in that it is either enabled  
or disabled for each individual READ or WRITE command.  
The device supports concurrent auto precharge if the  
command to the other bank does not interrupt the data  
transfer to the current bank.  
AUTO PRECHARGE ensures that the precharge is  
initiated at the earliest valid stage within a burst. This  
“earliest valid stage” is determined as if an explicit  
precharge command was issued at the earliest possible  
time, without violating tRAS (MIN).The user must not issue  
another command to the same bank until the precharge  
time (tRP) is completed.  
AUTO PRECHARGE  
BURST TERMINATE  
AUTO PRECHARGE is a feature which performs the  
same individual-bank PRECHARGE function described  
above, but without requiring an explicit command. This is  
accomplished by usingA10 to enableAUTO PRECHARGE  
in conjunction with a specic READ or WRITE command.  
A precharge of the bank/row that is addressed with the  
READ or WRITE command is automatically performed  
The BURST TERMINATE command is used to truncate  
READ bursts (with auto precharge disabled). The most  
recently registered READ command prior to the BURST  
TERMINATE command will be truncated. The open page  
which the READ burst was terminated from remains  
open.  
February 2007  
Rev. 4  
8
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com