W3E32M64S-XBX
White Electronic Designs
50. ICC2N specifies the DQ, DQS, and DM to be driven to a valid high or low logic level.
ICC2Q is similar to ICC2F except ICC2Q specifies the address and control inputs to
remain stable. Although ICC2F, ICC2N, and ICC2Q are similar, ICC2F is “worst case.”
51. Whenever the operating frequency is altered, not including jitter, the DLL is required
to be reset. This is followed by 200 clock cycles before any READ command.
52. This is the DC voltage supplied at the DRAM and is inclusive of all noise up to 20
MHz. Any noise above 20 MHz at the DRAM generated from any source other than
that of the DRAM itself may not exceed the DC voltage range of 2.6V ± 100mV.
February 2007
Rev. 4
15
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
MERCURY [ MERCURY UNITED ELECTRONICS INC ]
