MX25L8005
HOLD FEATURE
HOLD#pinsignalgoeslowtoholdanyserialcommunicationswiththedevice.TheHOLDfeaturewillnotstoptheoperation
of write status register, programming, or erasing in progress.
TheoperationofHOLDrequiresChipSelect(CS#)keepinglowandstartsonfallingedgeofHOLD#pinsignalwhileSerial
Clock (SCLK) signal is being low (if Serial Clock signal is not being low, HOLD operation will not start until Serial Clock
signal being low). The HOLD condition ends on the rising edge of HOLD# pin signal while Serial Clock(SCLK) signal is
being low( if Serial Clock signal is not being low, HOLD operation will not end until Serial Clock being low), see Figure 1.
Figure 1. Hold Condition Operation
CS#
SCLK
HOLD#
Hold
Hold
Condition
(standard)
Condition
(non-standard)
TheSerialDataOutput(SO)ishighimpedance, bothSerialDataInput(SI)andSerialClock(SCLK)aredon'tcareduring
the HOLD operation. If Chip Select (CS#) drives high during HOLD operation, it will reset the internal logic of the device.
To re-start communication with chip, the HOLD# must be at high and CS# must be at low.
P/N:PM1237
REV. 2.2, OCT. 23, 2008
6
Macronix [ MACRONIX INTERNATIONAL ]
