MX25L12835F
Register/Setting Commands
RDCR
(read
WRSR
(write status/
RDSR
(read status
register)
WPSEL
(Write Protect
Selection)
Command
(byte)
WREN
WRDI
EQIO
(Enable QPI)
(write enable) (write disable)
configuration configuration
register)
SPI/QPI
15 (hex)
register)
SPI/QPI
01 (hex)
Values
Mode
1st byte
SPI/QPI
06 (hex)
SPI/QPI
04 (hex)
SPI/QPI
05 (hex)
SPI/QPI
68 (hex)
SPI
35 (hex)
2nd byte
3rd byte
4th byte
Values
5th byte
Data Cycles
1-2
sets the (WEL)
write enable
latch bit
resets the
(WEL) write
enable latch bit status register configuration
to read out the to read out the to write new
values of the values of the values of the enable individal QPI mode
to enter and
Entering the
status/
configuration
register
block protect
mode
Action
register
PGM/ERS
Suspend
(Suspends
Program/
Erase)
PGM/ERS
Resume
(Resumes
Program/
Erase)
RDP (Release
from deep
power down)
SBL
(Set Burst
Length)
RDFBR
(read fast boot
register)
Command
(byte)
RSTQIO
(Reset QPI)
DP (Deep
power down)
Mode
1st byte
QPI
SPI/QPI
SPI/QPI
SPI/QPI
B9 (hex)
SPI/QPI
AB (hex)
SPI/QPI
C0 (hex)
SPI
F5 (hex)
B0 (hex)
30 (hex)
16(hex)
2nd byte
3rd byte
4th byte
5th byte
Data Cycles
1-4
Exiting the QPI
mode
enters deep
power down
mode
release from
deep power
down mode
to set Burst
length
Action
WRFBR
(write fast boot (erase fast
ESFBR
Command
(byte)
register)
boot register)
Mode
1st byte
SPI
SPI
17(hex)
18(hex)
2nd byte
3rd byte
4th byte
5th byte
Data Cycles
4
Action
P/N: PM1795
REV. 1.0, OCT. 23, 2012
17
Macronix [ MACRONIX INTERNATIONAL ]
