MX10L8050X
VCC
ICC
VCC
VCC
P0
EA
RST
MX10L8050X
(NC)
XTAL2
XTAL1
VSS
All other pins disconnected
Figure 8. ICC Test Condition, Power Down Mode
VCC=2.0V to 6.0V
VCC-0.5
0.7 VCC
0.45V
0.2 VCC-0.1
TCHCX
TCLCH
TCHCL
TCLCX
TCLCL
Figure 9. Clock Signal Waveform for ICC Tests in Active and Idle Modes.
TCLCH = TCHCL = 5 ns
EXPLANATION OF THE AC SYMBOLS
Q: Output Data
R: RD signal
T:Time
Each timing symbol has 5 characters. The first charac-
ter is always a "T" (stands for time). The other charac-
ters, depending on their positions, stand for the name of
a signal or the logical status of that signal. The following
is a list of all the characters and what they stand for.
A: Address
V:Valid
W:WR signal
X: No longer a valid logic level
Z: Float
C: Clock
D: Input Data
For example,
H: Logic level HIGH
TAVLL = Time from Address Valid to ALE Low
TLLPL = Time from ALE Low to PSEN Low
L: Logic level LOW, or ALE
P: PSEN
P/N:PM0803
REV. 0.0, APR. 23, 2001
8
Macronix [ MACRONIX INTERNATIONAL ]
