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MX10L8050QC 参数 Datasheet PDF下载

MX10L8050QC图片预览
型号: MX10L8050QC
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 14 页 / 147 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX10L8050X  
OSCILLATOR CHARACTERISTICS  
RST : Reset input. A high on this pin for two machine  
cycles while the oscillator is running resets the device.  
The port pins will be driven to their reset condition when  
a minimum VIHI voltage is applied whether the oscilla-  
tor is running or not. An internal pulldown resistor per-  
mits a power-on reset with only a capacitor connected  
to VCC.  
XTAL1 and XTAL2 are the input and output, respectively,  
of a inverting amplifier which can be configured for use  
as an on-chip oscillator, as shown in Figure 3. Either a  
quartz crystal or ceramic resonator may be used.  
C2  
ALE : Address Latch Enable output pulse for latching  
the low byte of the address during accesses to external  
memory.  
XTAL2  
C1  
XTAL1  
In normal operation ALE is emitted at a constant rate of  
1/6 the oscillator frequency, and may be used for exter-  
nal timing or clocking purposes. Note, however, that  
one ALE pulse is skipped during each access to exter-  
nal Data Memory.  
VSS  
C1, C2 = 30 pF is equal to or less than 10 pF for Crystal  
For Ceramic Resonators,contact resonator manufacture.  
Figure 3. Oscillator Connections  
If desired, ALE operation can be disabled by setting bit  
5 of SFR location 87H (PCON). With this bit set, the pin  
is weakly pulled high. However, the ALE disable feature  
will be suspended during a MOVX or MOVC instruction,  
idle mode, power down mode. The ALE disable feature  
will be terminated by reset. When the ALE disable fea-  
ture is suspended or terminated, the ALE pin will no  
longer be pulled up weakly. Setting the ALE-disable bit  
has no affect if the micrcontroller is in external execu-  
tion mode.  
To drive the device from an external clock source, XTAL1  
should be driven, while XTAL2 floats, as shown in Fig-  
ure 4. There are no requirememts on the duty cycle of  
the external clock signal, since the input to the internal  
clocking circuitry is through a divide-by-two flip-flop, but  
minimum and maximum high and low times specified  
on the data sheet must be observed.  
Throughout the remainder of this data sheet, ALE will  
refer to the signal coming out of the ALE pin, and the pin  
will be referred to as the ALE pin.  
An external oscillator may encounter as much as a 100  
pF load at XTAL1 when it starts up. This is due to inter-  
action between the amplifer and its feedback capaci-  
tance. Once the external signal meets the VIL and VIH  
specifications the capacitance will not exceed 20 pF.  
PSEN : Program Store Enable is the read strobe to ex-  
ternal Program Memory.  
When the MX10L8050X is executing code from external  
Program memory, PSEN is activated twice each ma-  
chine cycle, except that two PSEN activations are  
skipped during each access to external Data memory.  
N/C  
XTAL2  
EXTERNAL  
OSCILLATOR  
SIGNAL  
EA/VPP :Extrernal Access enable. EA must be strapped  
to VSS in order to enable the twiceto fetch code from  
external Program Memory locations 0000H to 0FFFFH.  
EA will be internally latched on reset.  
XTAL1  
VSS  
EA should be strapped to VCC for internal program ex-  
ecutions.  
Figure 4. External Clock Drive Configuration  
XTAL1 : Input to the inverting oscillator amplifier.  
XTAL2 : Output from the inverting oscillator amplifier.  
P/N:PM0803  
REV. 0.0, APR. 23, 2001  
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