MX10L8050X
DC CHARACTERISTICS (Over Operating Conditions)
All parameter values apply to all devices unless otherwise indicated.
Symbol Parameter
Min
Typ
Max
Unit
Test Conditions
(Note 4)
VIL
Input Low Voltage
-0.5
0.2 VCC-0.1
0.2 VCC-0.3
VCC+0.5
V
V
V
VIL1
VIH
Input Low Voltage EA
Input High Voltage
0
0.2 VCC+0.9
(Except XTAL1, RST)
Input High Voltage
VIH1
VOL
0.7 VCC
VCC+0.5
V
V
(XTAL1, RST)
Output Low Voltage (Note 5)
(Ports 1, 2, and 3)
0.4
0.4
IOL=1.6 mA (Note 1)
VOL1
VOH
Output Low Voltage (Note 5)
(Port 0, ALE, PSEN)
Output High Voltage
(Port 1, 2 and 3, ALE, PSEN)
V
V
IOL=3.2 mA (Note 1)
IOH=-10 uA
IOH=-30 uA
IOH=-60uA
0.9 VDD
0.75 VDD
0.5 VDD
0.9 VDD
0.75 VDD
0.5 VDD
V
V
VOH1
IIL
Output High Voltage
V
IOH=-80 uA
IOH=-300 uA
IOH=-800 uA
VIN=0.4V
(Port 0 in External Bus Mode)
V
V
Logical 0 Input Current
(Ports 1, 2 and 3)
-50
uA
ILI
Input leakage Current (Port 0)
Logical 1 to 0 Transition Current
(Ports 1, 2 and 3)
±10
uA
uA
VIN=VIL or VIH
VIN=2V
ITL
-750
Industrial
PRST
CIO
RST Pulldown Resistor
Pin Capacitance
15
150
K ohm
pF
10
2
@1 MHz, 25°C
ICC
Power Supply Current:
Active Mode at 40 MHz
Idle Mode at 40 MHz(70°C 5.5V)
Power Down Mode
(Note 3)
60
28
10
mA
mA
uA
NOTES:
1. Capacitive loading on Ports 0 and 2 may cause noise pulses above 0.4V to be superimposed on the VOLs of ALE and Ports 1, 2 and 3. The
noise is due to external bus capacitance discharging into the Port 0 and Port 2 pins when these pins change from 1 to 0. In applications
where capacitive loading exceeds 100 pF, the noise pulses on these signlas may exceed 0.8V. It may be desirable to qualify ALE or other
signals with a Schmitt Triggers, or CMOS-level input logic.
2. Capacitive loading on Ports 0 and 2 cause the VOH on ALE and PSEN to drop below the 0.9 VCC specification when the address lines are
stabilizing.
3. Minimum VCC for Power Down is 2V.
4. Typicals are based on a limited number of samples and are not guaranteed. The values listed are room temperature and 5V.
5. Under steady state (non-transient) conditions, IOL must be externally limited as follows:
Maximum IOL per port pin:
Maximum IOL per 8-bit port:
10mA
Port 0:
Ports 1, 2 and 3:
Maximum total IOL for all output pins:
26mA
15mA
71mA
If IOL exceeds the test condition, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test
conditions.
P/N:PM0803
REV. 0.0, APR. 23, 2001
6
Macronix [ MACRONIX INTERNATIONAL ]
