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MX10L8050QC 参数 Datasheet PDF下载

MX10L8050QC图片预览
型号: MX10L8050QC
PDF下载: 下载PDF文件 查看货源
内容描述: [Microcontroller, 8-Bit, MROM, 40MHz, CMOS, PQCC44, PLASTIC, LCC-44]
分类和应用: 时钟微控制器外围集成电路
文件页数/大小: 14 页 / 147 K
品牌: Macronix [ MACRONIX INTERNATIONAL ]
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MX10L8050X  
IDLE MODE  
ABSOLUTE MAXIMUM RATING*  
The user's software can invoke the Idle Mode. When  
the microcontroller is in this mode, power consumption  
is reduced. The Special Function Registers and the  
onboard RAM retain their values during Idle, but the pro-  
cessor stops executing instructions. Idle Mode will be  
exited if the chip is reset or if an enabled interrupt oc-  
curs.  
Ambient Temperature Under Bias  
StorageTemperature  
-40°C to +85°C  
-65°C to +150°C  
-0.5V to +6.5V  
15mA  
Voltage on Any Other Pin to VSS  
IOL Per I/O Pin  
Power Dissipation  
1.5W  
(Based on PACKAGE heat transfer limitations, not de-  
vice consumption)  
Table 2. Status of the External Pins during Idle and Power Down  
Mode  
Program Memory  
Internal  
ALE  
1
PSEN  
PORT0  
Data  
PORT1  
Data  
PORT2  
Data  
PORT3  
Data  
Idle  
1
1
0
0
Idle  
External  
1
Float  
Data  
Data  
Address  
Data  
Data  
Power Down  
Power Down  
Internal  
0
Data  
Data  
External  
0
Float  
Data  
Data  
Data  
POWER DOWN MODE  
To save even more power, a Power Down mode can be  
invoked by software. If this mode, the oscillator is stopped  
and the instruction that invoked Power Down is the last  
instruction executed. The on-chip RAM and Special  
Function Registers retain their values until the Power  
Down mode is terminated.  
To properly terminate Power Down, the reset or external  
interrupt should not be executed beforeVCC is restored  
to its normal operating level, and must be held active  
long enough for the oscillator to restart and stabilize (nor-  
mally less than 10 ms).  
With an external interrupt, INT0 and INT1 must be en-  
abled and configured as level-sensitive. Holding the pin  
low restarts the oscillator but bringing the pin back high  
completes the exit. Once the interrupt is serviced, the  
next instruction to be executed after RETI will be the  
one following the instruction that put the device into Power  
Down.  
On the MX10L8050X either a hardware reset or an exter-  
nal interrupt can cause an exit from Power Down. Re-  
set redefines all the SFRs but does not change the on-  
chip RAM. An external interrupt allows both the SFRs  
and on-chip RAM to retain their values.  
OPERATING CONDITIONS  
Symbol  
TA  
Description  
Min  
Max  
Units  
Ambient Temperature Under Bias  
Commerical  
0
+70  
+85  
5.5  
40  
°C  
Industrial  
-40  
2.7  
3.5  
°C  
VCC  
V
fOSC  
Oscillator Frequency  
MHz  
P/N:PM0803  
REV. 0.0, APR. 23, 2001  
5