LTC4270/LTC4271
APPLICATIONS INFORMATION
Port Current Policing
Masked Shutdown
TheLTC4270/LTC4271canaugmentt currentmonitor-
The LTC4270/LTC4271 provides a low latency port shed-
ding feature to quickly reduce the system load when
required. By allowing a pre-determined set of ports to
be turned off, the current on an overloaded main power
supply can be reduced rapidly while keeping high priority
devices powered. Each port can be configured to high or
low priority; all low-priority ports will shut down within
6.5ꢀs after the MSD pin is pulled low, high priority ports
will remain powered. If a port is turned off via MSD, the
correspondingDetectionandClassificationEnablebitsare
cleared, so the port will remain off until the host explicitly
re-enables detection.
CUT
ingwithapolicingfunctiontotracktheonesecondcurrent
averages. A port violating the user-specified Port Police
Threshold will be shut off with both a t and Police event
CUT
recorded. A port current Police event can be differentiated
from a port t violation by reading both events bits; both
CUT
bits are set for a Police violation while only the t
bit is
CUT
set for t
timer violations.
CUT
Port Voltage Readback
TheLTC4270/LTC4271measurestheoutputvoltageateach
port with an internal A/D converter. Port data is only valid
whentheportpowerisonandreadszeroatallothertimes.
In the LTC4270/LTC4271 chipset the active level of MSD
is register configurable as active high or low. The default
is LTC4266-compatible active low behavior.
Disconnect
The LTC4270/LTC4271 monitors powered ports to ensure
thePDcontinuestodrawtheminimumspecifiedcurrent.A
disconnecttimercountsupwheneverportcurrentisbelow
7.5mA(typ),indicatingthatthePDhasbeendisconnected.
Temperature and V Readback
EE
The LTC4270/LTC4271 measures the analog die tempera-
ture and V voltage with an internal 12-bit A/D converter.
EE
If the t timer expires, the port will be turned off and the
DIS
disconnect bit in the fault event register will be set. If the
General Purpose IO
current returns before the t timer runs out, the timer
DIS
Two sets of general purpose IO pins are available in the
LTC4270/LTC4271chipset.Thefirstsetofgeneralpurpose
IO are GP1 and GP0. These fully bidirectional IO are 3.3V
CMOS IO on the LTC4271 chip.
resets. As long as the PD exceeds the minimum current
level more often than t , it will remain powered.
DIS
Although not recommended, the DC disconnect feature
can be disabled by clearing the corresponding enable bits.
Note that this defeats the protection mechanisms built
into the IEEE specification, since a powered port will stay
powered after the PD is removed. If the still-powered port
is subsequently connected to a non-PoE data device, the
device may be damaged.
The second set of general purpose IO pins are XIO1 and
XIO0. These fully bidirectional IO are 4.3V CMOS IO on
the LTC4270 chip.
Code Download
LTC4271 firmware is field-upgradable by downloading
and executing RAM images. RAM images are volatile
The LTC4270/LTC4271 does not include AC disconnect
circuitry, but includes AC Disconnect Enable bits to main-
tain compatibility with the LTC4259A. If the AC Disconnect
Enable bits are set, DC disconnect will be used.
and must be re-downloaded after each V power cycle,
DD
EE
but will remain valid during reset and V power events.
Contact Linear Technology for code download procedures
and RAM images.
42701f
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Linear [ Linear ]
