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LTC3101EUF-PBF 参数 Datasheet PDF下载

LTC3101EUF-PBF图片预览
型号: LTC3101EUF-PBF
PDF下载: 下载PDF文件 查看货源
内容描述: 宽VIN ,多输出DC / DC转换器和控制器的PowerPath [Wide VIN, Multi-Output DC/DC Converter and PowerPath Controller]
分类和应用: 转换器控制器
文件页数/大小: 32 页 / 416 K
品牌: Linear [ Linear ]
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LTC3101  
OPERATION  
Low Dropout Operation  
Internal Voltage Mode Soft-Start  
As the input voltage decreases to a value approaching  
the output regulation voltage, the duty cycle increases to  
the maximum on-time of the P-channel switch. Further  
reduction of the supply voltage will force the main switch  
to remain on for more than one cycle and subharmonic  
switchingwilloccurtoprovideahighereffectivedutycycle.  
Iftheinputvoltageisdecreasedfurther,thebuckconverter  
will enter 100% duty cycle operation and the P-channel  
switch will remain on continuously. In this dropout state,  
the output voltage is determined by the input voltage less  
theresistivevoltagedropacrosstheP-channelswitchand  
series resistance of the inductor.  
Each buck converter has an independent internal voltage  
mode soft-start circuit with a nominal duration of 800ꢀs.  
The buck converters remain in regulation during soft-start  
and will therefore respond to output load transients which  
occurduringthistime. Inaddition, theoutputvoltagerise-  
time has minimal dependency on the size of the output  
capacitor or load current during start-up.  
Error Amplifier and Internal Compensation  
TheLTC3101buckconvertersutilizeinternaltransconduc-  
tanceerroramplifiers.Compensationofthebuckconverter  
feedback loops is performed internally to reduce the size  
of the application circuit and simplify the design process.  
Thecompensationnetworkhasbeendesignedtoallowuse  
of a wide range of output capacitors while simultaneously  
ensuring a rapid response to load transients.  
Slope Compensation  
Currentmodecontrolrequirestheuseofslopecompensa-  
tion to prevent sub-harmonic oscillations in the inductor  
currentwaveformathighdutycycleoperation.Thisfunction  
isperformedinternallyontheLTC3101throughtheaddition  
of a compensating ramp to the current sense signal. In  
some current mode ICs, current limiting is performed by  
clamping the error amplifier voltage to a fixed maximum.  
This leads to a reduced output current capability at low  
step-down ratios. In contrast, the LTC3101 performs cur-  
rent-limiting prior to addition of the slope compensation  
ramp and therefore achieves a peak inductor current limit  
that is independent of duty cycle.  
Power Good Comparator Operation  
Eachbuckconverterhasaninternalpowergoodcompara-  
tor that monitors the respective feedback pin voltage (FB1  
or FB2). The power good comparator outputs are used at  
power-upforsequencingpurposes. Duringnormalopera-  
tion, the power good comparators are used to monitor  
the output rails for a fault condition. If either buck power  
good comparator indicates a fault condition, the C and  
RS  
RESET pins are driven low. This can be used to reset a  
microprocessorintheapplicationcircuitwheneitherbuck  
converter output rail loses regulation.  
Output Short-Circuit Operation  
When the output is shorted to ground, the error amplifier  
will saturate high and the P-channel switch will turn on  
at the start of each cycle and remain on until the current  
limit trips. During this minimum on-time of the P-channel  
switch, the inductor current will increase rapidly but will  
decrease very slowly during the remainder of the period  
due to the very small reverse voltage produced by a hard  
outputshort.Toeliminatethepossibilityofinductorcurrent  
runaway in this situation, the switching frequency of the  
buck converters is reduced by a factor of four when the  
voltage on the respective feedback pin (FB1 or FB2) falls  
below 0.3V. This provides additional time for the inductor  
current to reset and thereby protects against a build-up  
of current in the inductor.  
The buck power good comparator will trip when the  
respective feedback pin falls 8% (nominally) below the  
regulation voltage. With a rising output voltage, the power  
good comparator will typically clear when the respective  
feedback voltage rises to within 5.5% of the regulation  
voltage. In addition, there is a 60ꢀs typical deglitching  
delay in the power good comparators in order to prevent  
false trips due to brief voltage transients occurring on  
load steps.  
3101f  
17  
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