LG Semicon
CKE Truth Table
Current
GM72V66841CT/CLT
CKE
Address
Function
CS
RAS CAS WE
State
n
n -1
Clock suspend
mode entry
Active
H
L
L
L
H
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Any
Clock suspend
L
Clock suspend
mode exit
Clock Suspend
H
Auto-refresh
command
(REF)
Idle
Idle
H
H
H
L
L
L
L
L
L
L
H
X
X
Self-refresh
entry
(SELF)
H
H
H
L
L
L
L
L
L
L
H
L
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
H
X
X
X
X
X
X
X
Power down
entry
Idle
H
H
H
H
Self refresh
exit
(SELFX)
Self refresh
Power down
H
L
Power down
Exit
H
* Notes : H: VIH, L: VIL, X: VIH or VIL.
Clock suspend mode entry: The synchronous
DRAM enters Clock suspend mode from active
mode by setting CKE to Low. The Clock suspend
mode changes depending on the current status (1
Clock before) as shown below.
WRITE suspend and WRIT A suspend: In
this mode, external signals are not accepted.
However, the internal state is held.
Clock suspend: During Clock suspend mode,
keep the CKE to Low.
ACTIVE Clock suspend: This suspend mode
ignores inputs after the next Clock by internally
maintaining the bank active status.
Clock suspend mode exit : The synchronous
DRAM exits from Clock suspend mode by
setting CKE to High during the Clock suspend
state.
READ suspend and READ A suspend: The
data being output is held (and continues to be
output).
IDLE: In this state, all banks are not selected,
and completed Precharge operation.
7
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