DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
LatticeECP/EC sysCONFIG Port Timing Specifications (Continued)
Over Recommended Operating Conditions
Parameter
Description
CSSPIN Active Setup Time
Min.
Typ.
Max.
Units
ns
t
t
f
t
t
300
—
600+6cyc
25
SOE
CSSPIN Low to First Clock Edge Setup Time
Max Frequency for SPI
300+3cyc
ns
CSPID
MAXSPI
SUSPI
HSPI
—
7
MHz
ns
SOSPI Data Setup Time Before CCLK
SOSPI Data Hold Time After CCLK
—
1
—
ns
Timing v.G 0.30
Master Clock
Clock Mode
Min.
1.75
3.78
7
Typ.
2.5
5.4
10
15
20
26
30
34
41
45
51
55
60
—
Max.
3.25
7.02
13
Units
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
MHz
%
2.5MHz
5 MHz
10 MHz
15 MHz
10.5
14
19.5
26
20 MHz
25 MHz
18.2
21
33.8
39
30 MHz
35 MHz
23.8
28.7
31.5
35.7
38.5
42
44.2
53.3
58.5
66.3
71.5
78
40 MHz
45 MHz
50 MHz
55 MHz
60 MHz
Duty Cycle
Timing v.G 0.30
40
60
3-25
LATTICE [ LATTICE SEMICONDUCTOR ]
