DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Lattice Semiconductor
Figure 3-10. Read Before Write (SP Read/Write on Port A, Input Registers Only)
CLKA
CSA
WEA
ADA
A0
A1
D1
A0
A1
A0
t
t
H
SU
D2
D3
D1
D0
DIA
t
t
t
t
t
ACCESS
ACCESS
ACCESS
ACCESS
ACCESS
old A0 Data
old A1 Data
D0
D1
DOA
D2
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
Figure 3-11. Write Through (SP Read/Write On Port A, Input Registers Only)
CLKA
CSA
WEA
Three consecutive writes to A0
ADA
A0
A1
D1
A0
t
t
H
SU
D2
D3
D2
D4
D0
DIA
t
t
t
t
ACCESS
ACCESS
ACCESS
ACCESS
Data from Prev Read
or Write
D0
D1
D3
DOA
D4
Note: Input data and address are registered at the positive edge of the clock and output data appears after the positive edge of the clock.
3-20
LATTICE [ LATTICE SEMICONDUCTOR ]
