DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
MLVDS
The LatticeECP2/M devices support the differential MLVDS standard. This standard is emulated using complemen-
tary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The MLVDS input standard is
supported by the LVDS differential input buffer. The scheme shown in Figure 3-5 is one possible solution for
MLVDS standard implementation. Resistor values in Figure 3-5 are industry standard values for 1% resistors.
Figure 3-5. MLVDS (Multipoint Low Voltage Differential Signaling)
Heavily loaded backplace, effective Zo~50 to 70 ohms differential
2.5V
R
=
R =
S
35ohms
2.5V
16mA
S
35ohms
16mA
50 to 70 ohms +/-1%
50 to 70 ohms +/-1%
R
R
TR
TL
2.5V
16mA
2.5V
16mA
R
=
S
R =
S
35ohms
35ohms
R
=
R
=
R
=
R =
S
35ohms
S
S
S
+
-
+
-
35ohms
35ohms
35ohms
. . .
2.5V
2.5V
2.5V
2.5V
16mA
16mA
16mA
16mA
Table 3-6. MLVDS DC Conditions1
Typical
Parameter
Description
Zo=50Ω
2.50
Zo=70Ω
2.50
Units
V
V
Output Driver Supply (+/-5%)
Driver Impedance
CCIO
OUT
Z
10.00
35.00
50.00
50.00
1.52
10.00
35.00
70.00
70.00
1.60
Ω
R
R
R
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
Ω
S
Ω
TL
Ω
TR
OH
OL
OD
CM
V
V
V
V
V
Output Low Voltage
0.98
0.90
V
Output Differential Voltage
Output Common Mode Voltage
DC Output Current
0.54
0.70
V
1.25
1.25
V
I
21.74
20.00
mA
DC
1. For input buffer, see LVDS table.
For further information about LVPECL, RSDS, MLVDS, BLVDS and other differential interfaces please see the list
of additional technical information at the end of this data sheet.
3-16
LATTICE [ LATTICE SEMICONDUCTOR ]
