DC and Switching Characteristics
LatticeECP2/M Family Data Sheet
Lattice Semiconductor
LVPECL
The LatticeECP2/M devices support the differential LVPECL standard. This standard is emulated using comple-
mentary LVCMOS outputs in conjunction with a parallel resistor across the driver outputs. The LVPECL input stan-
dard is supported by the LVDS differential input buffer. The scheme shown in Figure 3-3 is one possible solution for
point-to-point signals.
Figure 3-3. Differential LVPECL
V
= 3.3V
CCIO
(+/-5%)
R
= 93.1 ohms
(+/-1%)
S
S
16mA
+
-
V
= 3.3V
CCIO
R
= 196 ohms
(+/-1%)
R
= 100 ohms
(+/-1%)
P
T
(+/-5%)
R
= 93.1 ohms
(+/-1%)
16mA
Transmission line,
Zo = 100 ohm differential
On-chip
Off-chip
Off-chip
On-chip
Table 3-4. LVPECL DC Conditions1
Over Recommended Operating Conditions
Parameter
Description
Output Driver Supply (+/-5%)
Driver Impedance
Typical
Units
V
3.30
10
V
Ω
Ω
Ω
Ω
V
CCIO
OUT
Z
R
R
R
Driver Series Resistor (+/-1%)
Driver Parallel Resistor (+/-1%)
Receiver Termination (+/-1%)
Output High Voltage
93
S
196
P
100
T
V
V
V
V
2.05
1.25
0.80
1.65
100.5
12.11
OH
OL
OD
CM
BACK
Output Low Voltage
V
Output Differential Voltage
Output Common Mode Voltage
Back Impedance
V
V
Z
Ω
mA
I
DC Output Current
DC
1. For input buffer, see LVDS table.
3-14
LATTICE [ LATTICE SEMICONDUCTOR ]
