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IC43R16320B-6TL 参数 Datasheet PDF下载

IC43R16320B-6TL图片预览
型号: IC43R16320B-6TL
PDF下载: 下载PDF文件 查看货源
内容描述: [DDR DRAM, 32MX16, 0.7ns, CMOS, PDSO66, ROHS COMPLIANT, PLASTIC, TSOP2-66]
分类和应用: 动态存储器双倍数据速率光电二极管内存集成电路
文件页数/大小: 48 页 / 839 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
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IS43R16320B  
IC43R16320B  
Electrical Specifications  
All voltages are referenced to VSS (GND).  
After power up, wait more than 200 µs and then, execute power on sequence and CBR (Auto) refresh before  
proper device operation is achieved.  
Absolute Maximum Ratings  
Parameter  
Symbol  
VT  
Rating  
Unit  
V
Note  
Voltage on any pin relative to VSS  
Supply voltage relative to VSS  
Short circuit output current  
Power dissipation  
–1.0 to +3.6  
–1.0 to +3.6  
50  
VDD  
IOS  
PD  
V
mA  
W
1.0  
Operating ambient temperature  
Storage temperature  
TA  
0 to +70  
–55 to +125  
°C  
°C  
Tstg  
Caution  
Exposing the device to stress above those listed in Absolute Maximum Ratings could cause  
permanent damage. The device is not meant to be operated under conditions outside the limits  
described in the operational section of this specification. Exposure to Absolute Maximum Rating  
conditions for extended periods may affect device reliability.  
Recommended Operating Conditions (TA = 0°C to +70°C)  
Parameter  
Symbol  
Speed  
min.  
typ.  
max.  
Unit Notes  
Supply voltage  
VDD, VDDQ DDR400  
2.5  
2.6  
2.7  
V
V
V
V
V
V
V
1
1
VDD, VDDQ DDR333, 266  
2.3  
2.5  
2.7  
VSS, VSSQ  
VREF  
0
0
0
Input reference voltage  
Termination voltage  
Input high voltage  
Input low voltage  
0.49 × VDDQ  
VREF – 0.04  
VREF + 0.15  
–0.3  
0.50 × VDDQ  
0.51 × VDDQ  
VREF + 0.04  
VDDQ + 0.3  
VREF – 0.15  
VTT  
VREF  
VIH (DC)  
VIL (DC)  
2
3
Input voltage level,  
CK and /CK inputs  
VIN (DC)  
VIX (DC)  
VID (DC)  
–0.3  
VDDQ + 0.3  
V
V
V
4
Input differential cross point  
voltage, CK and /CK inputs  
0.5 × VDDQ −  
0.2V  
0.5 × VDDQ +  
0.2V  
0.5 × VDDQ  
Input differential voltage,  
CK and /CK inputs  
0.36  
VDDQ + 0.6  
5, 6  
Notes: 1. VDDQ must be lower than or equal to VDD.  
2. VIH is allowed to exceed VDD up to 3.6V for the period shorter than or equal to 5ns.  
3. VIL is allowed to outreach below VSS down to –1.0V for the period shorter than or equal to 5ns.  
4. VIN (DC) specifies the allowable DC execution of each differential input.  
5. VID (DC) specifies the input differential voltage required for switching.  
6. VIH (CK) min assumed over VREF + 0.18V, VIL (CK) max assumed under VREF – 0.18V  
if measurement.  
6
Integrated Silicon Solution, Inc. — www.issi.com  
Rev. 00B  
06/11/08  
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