IC41C1665
IC41LV1665
TRUTH TABLE
Function
Standby
R A S
LCAS UCAS W E
O E Address tR/tC I/O
H
L
L
H
L
L
H
X
H
H
X
L
L
X
High-Z
Read: Word
Read: Lower Byte
L
ROW/COL
ROW/COL
DOUT
H
Lower Byte, DOUT
Upper Byte, High-Z
Read: Upper Byte
L
H
L
H
L
ROW/COL
Lower Byte, High-Z
Upper Byte, DOUT
Write: Word (Early Write)
L
L
L
L
L
L
L
X
X
ROW/COL
ROW/COL
DIN
Write: Lower Byte (Early Write)
H
Lower Byte, DIN
Upper Byte, High-Z
Write: Upper Byte (Early Write)
L
L
H
L
L
L
L
X
ROW/COL
ROW/COL
Lower Byte, High-Z
Upper Byte, DIN
Read-Write(1,2)
Hidden Refresh2)
H→L
H
L
L→H
L
X
DOUT, DIN
Read L→H→L
Write L→H→L
L
L
L
L
ROW/COL
ROW/COL
DOUT
DIN
RAS-Only Refresh
L
H
L
H
L
X
X
X
X
ROW/NA
X
High-Z
High-Z
CBR Refresh(3)
H→L
Notes:
1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active).
2. These READ cycles may also be BYTE READ cycles (either LCAS or UCAS active).
3. At least one of the two CAS signals must be active (LCAS or UCAS).
4
Integrated Circuit Solution Inc.
DR031-0A 10/17/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
