IC41C1665
IC41LV1665
64K x 16 (1-MBIT) DYNAMIC RAM
WITH FAST PAGE MODE
FEATURES
DESCRIPTION
The ICSI IC41C1665 and the IC41LV1665 are 65,536 x 16-
bit high-performance CMOS Dynamic Random Access
Memory. Fast Page Mode allows 256 random accesses
within a single row with access cycle time as short as 12 ns
per 16-bit word. The Byte Write control, of upper and lower
byte, makes these devices ideal for use in 16-, 32-bit wide
data bus systems.
• Fast access and cycle time
• TTL compatible inputs and outputs
• Refresh Interval: 256 cycles/4 ms
•
Refresh Mode: RAS-Only, CAS-before-RAS
(CBR), Hidden
• JEDEC standard pinout
• Single power supply:
These features make the IC41C1665 and the IC41LV1665
ideally suited for high band-width graphics, digital signal
processing, high-performance computing systems, and
peripheral applications.
— 5V ± 10% (IC41C1665)
— 3.3V ± 10% (IC41LV1665)
• Byte Write and Byte Read operation via
two CAS
The IC41C1665 and the IC41LV1665 are packaged in a 40-
pin, 400mil SOJ and TSOP-2.
• Available in 40-pin SOJ and TSOP-2
KEY TIMING PARAMETERS
Parameter
-25 -30 -35 -40 Unit
Max. RAS Access Time (tRAC)
Max. CAS Access Time (tCAC)
25
30
35
10
18
23
65
40
11
20
25
75
ns
ns
ns
ns
ns
8
9
Max. Column Address Access Time (tAA) 12
16
20
55
Min. Fast Page Mode Cycle Time (tPC)
Min. Read/Write Cycle Time (tRC)
15
43
PIN CONFIGURATIONS
40-Pin SOJ
40-Pin TSOP-2
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
NC
1
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
I/O8
NC
VCC
I/O0
I/O1
I/O2
I/O3
VCC
I/O4
I/O5
I/O6
I/O7
1
2
3
4
5
6
7
8
9
10
40
39
38
37
36
35
34
33
32
31
GND
I/O15
I/O14
I/O13
I/O12
GND
I/O11
I/O10
I/O9
2
3
PIN DESCRIPTIONS
4
5
A0-A7
I/O0-I/O15
WE
Address Inputs
6
7
Data Inputs/Outputs
Write Enable
8
9
I/O8
10
11
12
13
14
15
16
17
18
19
20
OE
Output Enable
RAS
Row Address Strobe
NC
NC
WE
RAS
NC
A0
11
12
13
14
15
16
17
18
19
20
30
29
28
27
26
25
24
23
22
21
NC
NC
LCAS
UCAS
OE
LCAS
UCAS
OE
WE
RAS
NC
UCAS
Upper Column Address
Strobe
NC
NC
LCAS
Lower Column Address
Strobe
A0
A7
A7
A1
A6
A1
A6
A2
A5
A2
A5
Vcc
GND
NC
Power
A3
A4
A3
A4
Ground
VCC
GND
VCC
GND
No Connection
ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors
which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc.
2
Integrated Circuit Solution Inc.
DR031-0A 10/17/2001
ISSI [ INTEGRATED SILICON SOLUTION, INC ]
