欢迎访问ic37.com |
会员登录 免费注册
发布采购

66WVE4M16ALL-70TLI 参数 Datasheet PDF下载

66WVE4M16ALL-70TLI图片预览
型号: 66WVE4M16ALL-70TLI
PDF下载: 下载PDF文件 查看货源
内容描述: [Pseudo Static RAM, 4MX16, 70ns, CMOS, PDSO48, TSOP1-48]
分类和应用: 光电二极管内存集成电路
文件页数/大小: 30 页 / 676 K
品牌: ISSI [ INTEGRATED SILICON SOLUTION, INC ]
 浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第18页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第19页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第20页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第21页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第23页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第24页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第25页浏览型号66WVE4M16ALL-70TLI的Datasheet PDF文件第26页  
IS66WVE4M16ALL  
Advanced Information  
Table10 . Load Configuration Register Timing Requirements  
-70  
Symbol  
Parameter  
Address setup time  
Unit  
Note  
Min  
0
Max  
tAS  
tAW  
tCDZZ  
tCW  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Address valid to end of write  
Chip deselect to ZZ# LOW  
Chip enable to end of write  
Write cycle time  
70  
5
70  
70  
46  
0
tWC  
tWP  
Write pulse width  
tWR  
Write recovery time  
tZZWE  
ZZ# LOW to WE# LOW  
10  
500  
Table11 . DPD Timing Requirements  
-70  
Symbol  
Parameter  
Unit  
Notes  
Min  
5
Max  
tCDZZ  
tR  
Chip deselect to ZZ# LOW  
Deep Power-down recovery  
Minimum ZZ# pulse width  
ns  
us  
us  
150  
10  
tZZ( MIN)  
Table12 . Initialization Timing Requirements  
-70  
Symbol  
tPU  
Parameter  
Initialization Period (required before normal operations)  
Unit  
us  
Notes  
Min  
Max  
150  
22  
www.issi.com - SRAM@issi.com  
Rev.00C | March 2010  
 复制成功!