X9428
Instruction Format
Notes: (1)
(2)
(3)
(4)
(5)
“MACK”/”SACK”: stands for the acknowledge sent by the master/slave.
“A3 ~ A0”: stands for the device addresses sent by the master.
“X”: indicates that it is a “0” for testing purpose but physically it is a “don’t care” condition.
“I”: stands for the increment operation, SDA held high during active SCL phase (high).
“D”: stands for the decrement operation, SDA held low during active SCL phase (high).
Read Wiper Counter Register (WCR)
S device type
device
T
identifier
addresses
A
R 0 1 0 1 A A 0 A
3 2
0
T
instruction
wiper position
S
S
opcode
(sent by slave on SDA)
A
A
W W W W W W
C
C
1 0 0 1 0 0 0 0
0 0 P P P P P P
K
K
5 4 3 2 1 0
M
A
C
K
S
T
O
P
Write Wiper Counter Register (WCR)
S device type
device
T
identifier
addresses
A
R 0 1 0 1 A A 0 A
3 2
0
T
instruction
wiper position
S
S
opcode
(sent by master on SDA)
A
A
W W W W W W
C
C
P P P P
K 1 0 1 0 0 0 0 0 K 0 0 P P
5 4 3 2 1 0
S
A
C
K
S
T
O
P
Read Data Register (DR)
S device type
device
T
identifier
addresses
A
R 0 1 0 1 A A 0 A
3 2
0
T
instruction
register
S
opcode
addresses
A
C
R R
1 0 1 1
0 0
K
1 0
wiper position/data
S
(sent by slave on SDA)
A
W W W W W W
C
K 0 0 P P P P P P
5 4 3 2 1 0
M
A
C
K
S
T
O
P
Write Data Register (DR)
S device type
device
instruction
register
S
T identifier
addresses
opcode
addresses
A
A
C
R R
R 0 1 0 1 A A 0 A
1 1 0 0
0 0
3 2
0 K
1 0
T
wiper position/data
S
(sent by master on SDA)
A
W W W W W W
C
0 0 P P P P P P
K
5 4 3 2 1 0
S
A
C
K
S
T HIGH-VOLTAGE
O WRITE CYCLE
P
XFR Data Register (DR) to Wiper Counter Register (WCR)
S device type
device
instruction
register
S
T identifier
addresses
opcode
addresses
A
A
C
R R
R 0 1 0 1 A A 0 A
1 1 0 1
0 0
3 2
0 K
1 0
T
S
A
C
K
S
T
O
P
11
FN8197.1
April 26, 2006
INTERSIL [ INTERSIL CORPORATION ]
