ISL88731C
ensure the zero is at a frequency lower than the pole
including tolerance variations.
VADAPTER
RAMP GEN
RAMP = VADAPTER/11
L
PHASE
V
11
L
RFET_RDSON
RL_DCR
-
+
CO
CA2
RF2
CSOP
CSON
+
Σ
0.25
+
SΣ
Σ
PWM
INPUT
20X
-
CF2
RS2
-
ICOMP
-
GMI
RBAT
CO
RESR
DACI
+
PWM
CICOMP
GAIN = 11
L
RS2
FIGURE 22. CHARGE CURRENT LIMIT LOOP
11
RFET_RDSON
RL_DCR
CO
RBAT
1.5 ⋅ 4 ⋅ (50μA ⁄ V) ⋅ L
PWM
INPUT
-------------------------------------------------------------------------------------------
=
C
(EQ. 18)
ICOMP
(RS2 + r
+ R
+ R
)
BAT
DS(ON)
DCR
RESR
A filter should be added between RS2 and CSOP and
CSON to reduce switching noise. The filter roll-off
frequency should be between the crossover frequency
and the switching frequency (~100kHz). RF2 should be
small (<10Ω) to minimize offsets due to leakage current
into CSOP. The filter cutoff frequency is calculated using
Equation 19:
FIGURE 21. SMALL SIGNAL AC MODEL
In most cases the Battery resistance is very small
(<200mΩ) resulting in a very low Q in the output filter.
This results in a frequency response from the input of the
PWM to the inductor current with a single pole at the
frequency calculated in Equation 15:
1
------------------------------------------
F
=
(EQ. 19)
FILTER
(RS2 + r
+ R
+ R
)
(2π ⋅ C ⋅ R
)
F2
DS(ON)
DCR
BAT
F2
(EQ. 15)
-------------------------------------------------------------------------------------------
=
F
POLE1
2π ⋅ L
The crossover frequency is determined by the DC gain of
the modulator and output filter and the pole in
Equation 16. The DC gain is calculated in Equation 20
and the cross over frequency is calculated with
Equation 21:
The output capacitor creates a pole at a very high
frequency due to the small resistance in parallel with it.
The frequency of this pole is calculated in Equation 16:
1
--------------------------------------
=
F
(EQ. 16)
POLE2
2π ⋅ C ⋅ R
o
BAT
11 ⋅ RS2
(EQ. 20)
-------------------------------------------------------------------------------------------
=
A
Charge Current Control Loop
DC
(RS2 + r
+ R
+ R
)
BAT
DS(ON)
DCR
When the battery is less than the fully charged, the
voltage error amplifier goes to it’s maximum output
(limited to 0.3V above ICOMP) and the ICOMP voltage
controls the loop through the minimum voltage buffer.
Figure 23 shows the charge current control loop.
11 ⋅ RS2
2π ⋅ L
(EQ. 21)
-----------------------
F
= A
⋅ F
=
CO
DC
POLE
The Bode plot of the loop gain, the compensator gain and
the power stage gain is shown in Figure 23.
The compensation capacitor (C
) gives the error
ICOMP
amplifier (GMI) a pole at a very low frequency (<<1Hz)
and a a zero at FZ1. FZ1 is created by the 0.25*CA2
output added to ICOMP. The frequency can be calculated
from Equation 17:
Adapter Current Limit Control Loop
If the combined battery charge current and system load
current draws current that equals the adapter current
limit set by the InputCurrent register, ISL88731C will
reduce the current to the battery and/or reduce the
output voltage to hold the adapter current at the limit.
Above the adapter current limit the minimum current
buffer equals the output of GMS and ICOMP controls the
charger output. Figure 24 shows the adapter current limit
control loop.
4 ⋅ gm2
---------------------------------------
=
F
(EQ. 17)
gm2 = 50μA ⁄ V
ZERO
(2π ⋅ C
)
ICOMP
Placing this zero at a frequency equal to the pole
calculated in Equation 16 will result in maximum gain at
low frequencies and phase margin near 90°. If the zero is
at a higher frequency (smaller C
), the DC gain will
ICOMP
be higher but the phase margin will be lower. Use a
capacitor on ICOMP that is equal to or greater than the
value calculated in Equation 18. The factor of 1.5 is to
FN6978.0
March 8, 2010
20
INTERSIL [ Intersil ]
