ISL705AEH, ISL705BEH, ISL705CEH, ISL706AEH, ISL706BEH, ISL706CEH
is at its maximum specified value. This allows the positive supply
to fluctuate within its acceptable range without signaling a reset
when configured as shown in Figure 34.
V
DD
R1(V
– V
)
PFI
TRIP
---------------------------------------------
(EQ. 2)
R2=
V
– V
PFI
RST
DD
In Figure 34, the ISL705AEH is monitoring +5V through V and
DD
100kΩ
-5V through PFI. In this example, the trip point (V
) for the
TRIP
negative supply rail is set for -4.5V. Equation 2 can be used to
select the appropriate resistor values. R1 is selected arbitrarily as
ISL705AEH, ISL706AEH
100kΩ, V = 5V, V = 1.25V, and V
= (-4.5V). By plugging
DD PFI
TRIP
FIGURE 35. RST VALID TO GROUND CIRCUIT
the values into Equation 2 (as shown in Equation 3) it can be
seen a resistor of 153.3kΩ is needed. The closest 1% resistor
value is 154kΩ.
Assuring a Valid RST Output
On the ISL705BEH and ISL706BEH, when V falls below 1.2V, the
RST output can no longer source enough current to track V . As a
DD
100k(1.25 – (–4.5))
-----------------------------------------------------
(EQ. 3)
DD
R2=
= 153.3kΩ
5 – 1.25
result, this pin can drift to undetermined voltages if left undriven. By
adding a pull-up resistor to the RST pin as shown in Figure 36, RST
+5V
will track V below 1.2V. The resistor value (R1) is not critical
100k
DD
V
DD
however, it should be large enough not to exceed the sink capability
of RST pin at 1.2V. A 300kΩ resistor would suffice, assuming there
is no load on the RST pin during that time.
R1
R2
MR
100k
2N3904
PFO
PFI
V
DD
R1
300kΩ
RST
RST
-5V
ISL705AEH
FIGURE 34. ±5V MONITORING
ISL705BEH, ISL706BEH
FIGURE 36. RST VALID TO GROUND CIRCUIT
Figure 4 also has a general purpose NPN transistor in which the
base is connected to the PFO pin through a 100kΩ resistor. The
emitter is tied to ground and the collector is tied to MR signal.
This configuration allows the negative voltage sense circuit to
initiate a reset if it is not within its regulation window. A pull-up
on the MR ensures no false reset triggering when the negative
voltage is within its regulation window.
Selecting Pull-Up Resistor Values
The ISL705CEH and ISL706CEH have open drain active low reset
outputs (RST_OD). A pull-up resistor is needed to ensure RST_OD
is high when V is in a valid state (Figure 37). The resistor value
DD
must be chosen in order not to exceed the sink capability of the
RST_OD pin. The ISL705AEH has a sink capability of 3.2mA and
the ISL706CEH has a sink capability of 1.2mA. Equation 4 may
Assuring a Valid RST Output
be used to select resistor R
based on the pull-up voltage
. It is also important that the pull-up voltage does not
PULL
When V falls below 1.2V, the RST output can no longer sink
DD
V
PULL
exceed V
current and is essentially an open circuit. As a result, this pin can
drift to undetermined voltages if left undriven. By adding a pull-down
resistor to the RST pin as shown in Figure 35, any stray charge or
leakage currents will be drained to ground and keep RST low when
.
DD
V
PULL
V
DD
V
falls below 1.2V. The resistor value (R1) is not critical however, it
DD
should be large enough not to load RST and small enough to pull
RST to ground. A 100kΩ resistor would suffice, assuming there is no
load on the RST pin during that time.
R
PULL
RST_OD
ISL706CEH, ISL705CEH
FIGURE 37. RST_OD PULL-UP CONNECTION
FN8262.0
March 30, 2012
14
INTERSIL [ Intersil ]
