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Intel Advanced+ Boot Block Flash Memory (C3)
Table 15. Read Operations—32 Mbit Density
Density
32 Mbit
Product
70 ns
90 ns
100 ns
110 ns
Para-
meter
#
Sym
Unit Notes
V
2.7 V–3.6 V 2.7 V–3.6 V 3.0 V–3.3 V 2.7 V–3.3 V 3.0 V–3.3 V 2.7 V–3.3 V
Min Max Min Max Min Max Min Max Min Max Min Max
CC
R1
R2
t
Read Cycle Time
ns
ns
3,4
3,4
70
90
90
100
100
110
AVAV
t
Address to Output
Delay
AVQ
V
70
70
90
90
90
90
100
100
30
100
100
30
110
110
30
t
CE# to Output
Delay
ELQ
V
R3
R4
R5
R6
R7
R8
R9
ns
ns
ns
ns
ns
ns
ns
1,3,4
1,3,4
3,4
t
t
OE# to Output
Delay
GLQ
V
20
20
30
RP# to Output
Delay
PHQ
V
150
150
150
150
150
150
t
CE# to Output in
Low Z
ELQ
X
2,3,4
2,3,4
2,3,4
2,3,4
0
0
0
0
0
0
0
0
0
0
0
0
t
t
OE# to Output in
Low Z
GLQ
X
CE# to Output in
High Z
EHQ
Z
20
20
20
20
20
20
20
20
20
20
20
20
t
OE# to Output in
High Z
GHQ
Z
Output Hold from
Address, CE#, or
OE# Change,
Whichever
R10
t
ns
2,3,4
0
0
0
0
0
0
OH
Occurs First
NOTES:
1. OE# may be delayed up to tELQV– GLQV
2. Sampled, but not 100% tested.
3. See Figure 8, “Read Operation Waveform” on page 42.
t
after the falling edge of CE# without impact on tELQV.
4. See Figure 11, “AC Input/Output Reference Waveform” on page 49 for timing measurements and maximum allowable
input slew rate.
Datasheet
41
INTEL [ INTEL ]
