256-Mbit J3 (x8/x16)
Table 7. DC Voltage Characteristics
Symbol
Parameter
Min
Max
Unit
Test Conditions
Notes
V
during Block Erase,
PEN
V
2.7
2.0
3.6
V
V
3,4
5
PENH
LKO
Program, or Lock-Bit Operations
V Lockout Voltage
CC
V
NOTES:
1. Includes STS.
2. Sampled, not 100% tested.
3. Block erases, programming, and lock-bit configurations are inhibited when V
≤ V
,
PEN
PENLK
and not guaranteed in the range between V
(max).
(max) and V
(min), and above V
PENLK
PENH PENH
4. Typically, V
is connected to V (2.7 V–3.6 V).
PEN
CC
5. Block erases, programming, and lock-bit configurations are inhibited when V < V
, and
CC
LKO
not guaranteed in the range between V
(min) and V (min), and above V (max).
LKO
CC CC
6. Includes all operational modes of the device including standby and power-up sequences.
7. VCC operating condition for standby has to meet typical operationg coditons.
Datasheet
21
INTEL [ INTEL ]
