欢迎访问ic37.com |
会员登录 免费注册
发布采购

SPD6722QCCE 参数 Datasheet PDF下载

SPD6722QCCE图片预览
型号: SPD6722QCCE
PDF下载: 下载PDF文件 查看货源
内容描述: ISA到PC卡( PCMCIA )控制器 [ISA-to-PC-Card (PCMCIA) Controllers]
分类和应用: 总线控制器微控制器和处理器PC
文件页数/大小: 138 页 / 837 K
品牌: INTEL [ INTEL ]
 浏览型号SPD6722QCCE的Datasheet PDF文件第78页浏览型号SPD6722QCCE的Datasheet PDF文件第79页浏览型号SPD6722QCCE的Datasheet PDF文件第80页浏览型号SPD6722QCCE的Datasheet PDF文件第81页浏览型号SPD6722QCCE的Datasheet PDF文件第83页浏览型号SPD6722QCCE的Datasheet PDF文件第84页浏览型号SPD6722QCCE的Datasheet PDF文件第85页浏览型号SPD6722QCCE的Datasheet PDF文件第86页  
PD6710/22 ISA-to-PC-Card (PCMCIA) Controllers  
10.7.5  
External Data (PD6722 only, Socket A, Index 6Fh)  
Register Name: External Data  
Index: 6Fh only  
Register Per: socket  
Extended Index: 0Ah  
Bit 4 Bit 3  
External Data External Data External Data External Data  
Register Compatibility Type: ext.  
Bit 7  
Bit 6  
Bit 5  
Bit 2  
Bit 1  
Bit 0  
External Data External Data External Data External Data  
3 or 2 or 1 or 0 or  
B_VS2# Input B_VS1# Input A_VS2# Input A_VS1# Input  
7
6
5
4
RW:0  
RW:0  
RW:0  
RW:0  
R:0 R:0 R:0 R:0  
Bits 7:0 External Data  
This register is updated and accessed according to the setting of bits 3 and 4 of the Socket B  
Extension Control 2 register (Index 6Fh, Extended Index 0Bh).  
Table 16. Functions of Socket B External Data Register (PD6722 only)  
Socket B Extension Control 2  
Function of Socket B External Data Register  
Bit 4: GPSTB  
on IOW*  
Bit 3: GPSTB  
on IOR*  
Bits 7:4 scratchpad  
0
0
0
1
Bits 3:2 Socket B VS2# and VS1# levels (PD6722 only)  
Bits 1:0 Socket A VS2# and VS1# levels  
External read port: B_GPSTB is a read buffer enable for external data on  
SD[15:8].  
External write port: B_GPSTB is a write latch enable for SD[15:8] to get  
latched to an external register. Reads of Socket B External Data register  
produce the value written to the latch.  
1
1
0
1
Reserved  
Note: For software compatibility of external data access accross the PC Card (PCMCIA) controller  
product line, the Socket B External Data register should only be used as a read port and not as a  
write port. Also for compatibility, only the lower nibble of External Data should be accessed and  
the upper nibble should be ignored. For software compatibility with VS1# and VS2# detection  
software, when Socket B is used as a read port, socket VS1# and VS2# signals should be connected  
to the external read buffer as shown in Figure 15 on page 96.  
Refer to Using GPSTB Pins for External Port Control (PD6722 only)on page 91 for more  
information on the use of the External Data register, and VS1# and VS2# Voltage Detectionon  
page 95 for more information on VS1# and VS2# detection.  
82  
Datasheet  
 
 复制成功!