PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
10.7.1
Data Mask 0–1
Register Name: Data Mask 0–1
Index: 2Fh
Register Per: socket
Extended Index: 01h, 02h
Bit 4 Bit 3
Register Compatibility Type: ext.
Bit 7
Bit 6
Bit 5
Bit 2
Bit 1
Bit 0
Data Mask Select 0–1
RW:00000000
Data Mask 0 is the mask register for I/O Map 0. For each bit set in the Data Mask Select 0 field,
the corresponding data bit will not be driven when the host addresses PC Card I/O addresses in the
I/O Map 0 range. If this register is set to 00h, then all data bits will be driven from the PC Card to
the ISA bus (this is the reset condition). If any bits are set to ‘1’, accesses to the I/O Map 0 range of
I/O on the PC Card will be forced to 8-bit operation on the ISA side. If, for example, I/O Map 0
registers are set for the range 3F7h to 3F7h, I/O Map 1 registers are set for the range 3F0h to 3F6h,
Data Mask Select 0 is set to 7Fh, and a floppy drive is the PC Card device, then the conflict
between the floppy address 3F7h and the hard disk register at 3F7h would not cause a conflict on
the ISA bus — the floppy change bit would be correctly presented to the host.
The Data Mask 1 register operates the same as the Data Mask 0 register but acts on I/O addresses
in the range indicated by the I/O Map 1 registers.
10.7.2
Extension Control 1 (PD6722 only, formerly DMA Control)
Register Name: Extension Control 1
Index: 2Fh
Register Per: socket
Extended Index: 03h
Bit 4 Bit 3
Register Compatibility Type: ext.
Bit 7
Bit 6
Bit 5
Bit 2
Bit 1
Bit 0
DMA Enable
Pull-up
Control
LED Activity
Enable
Auto Power
Clear Disable
V
CC
Power
Reserved
(PD6722)
RW:00
Lock
RW:0
RW:00
RW:0
RW:0
RW:0
Bit 0 — V Power Lock
CC
0
1
The V Power bit (bit 4 of Power Control register) is not locked.
CC
The V Power bit (bit 4 of Power Control register) cannot be changed by software.
CC
This bit can be used to prevent card drivers from overriding the Socket Services’ task of controlling
power to the card, thus preventing situations where cards are powered incorrectly.
Bit 1 — Auto Power Clear Disable
0
1
The V Power bit (bit 4 of Power Control register) is reset to ‘0’ when the card is removed.
CC
The V Power bit (bit 4 of Power Control register) is not affected by card removal.
CC
78
Datasheet
INTEL [ INTEL ]
