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RD28F1602C3B110 参数 Datasheet PDF下载

RD28F1602C3B110图片预览
型号: RD28F1602C3B110
PDF下载: 下载PDF文件 查看货源
内容描述: 3 VOLT英特尔?高级+引导?座闪存?记忆? ( C3) ?堆叠芯片? ScalPackage ? Familye [3 VOLT INTEL Advanced+BootBlock FlashMemory(C3)Stacked-ChipScalPackageFamilye]
分类和应用: 闪存存储内存集成电路静态存储器
文件页数/大小: 70 页 / 1167 K
品牌: INTEL [ INTEL ]
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3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family  
Table 2. 3 Volt Intel® Advanced+ Boot Block Stacked-CSP Ball Descriptions (Sheet 2 of 2)  
Symbol  
Type  
Name and Function  
FLASH WRITE PROTECT: Controls the lock-down function of the flexible Locking feature.  
When F-WP# is a logic low, the lock-down mechanism is enabled and blocks marked lock-  
down cannot be unlocked through software.  
F-WP#  
INPUT  
When F-WP# is logic high, the lock-down mechanism is disabled and blocks previously  
locked-down are now locked and can be unlocked and locked through software. After F-WP# goes  
low, any blocks previously marked lock-down revert to that state.  
See Section 7.0, “System Design Considerations” on page 41 for details on block locking.  
FLASH POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device core operations.  
FLASH I/O POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device I/O operations.  
SRAM POWER SUPPLY: [2.7 V–3.3 V] Supplies power for device operations.  
F-VCC  
SUPPLY  
SUPPLY  
F-VCCQ  
S-VCC  
SUPPLY  
See Section 7.2.2, “F-VCC, F-VPP and F-RP# Transition” on page 42 for details of power  
connections.  
FLASH PROGRAM/ERASE POWER SUPPLY: [1.65 V–3.3 V or 11.4 V–12.6 V] Operates as an  
input at logic levels to control complete flash protection. Supplies power for accelerated flash  
program and erase operations in 12 V ± 5% range. This ball cannot be left floating.  
Lower F-V V  
, to protect all contents against Program and Erase commands.  
PP  
PPLK  
Set F-V = F-V for in-system read, program and erase operations. In this configuration,  
PP  
CC  
INPUT /  
SUPPLY  
F-VPP  
F-V can drop as low as 1.65 V to allow for resistor or diode drop from the system supply. Note  
PP  
that if F-V is driven by a logic signal, V  
1.65 V. That is, F-V must remain above 1.65 V to  
PP  
IH =  
PP  
perform in-system flash modifications.  
Raise F-V to 12 V ± 5% for faster program and erase in a production environment. Applying  
PP  
12 V ± 5% to F-V can only be done for a maximum of 1000 cycles on the main blocks and 2500  
PP  
cycles on the parameter blocks. F-V may be connected to 12 V for a total of 80 hours maximum.  
PP  
F-VSS  
S-VSS  
NC  
SUPPLY  
SUPPLY  
FLASH GROUND: For all internal circuitry. All ground inputs must be connected.  
SRAM GROUND: For all internal circuitry. All ground inputs must be connected.  
NOT CONNECTED: Internally disconnected within the device.  
10  
Datasheet