Electrical Specifications
Table 9. AGTL+ Signal Group DC Specifications
Symbol
Parameter
I/O Voltage
Min
Typ
Max
Unit
Notes1
VCCP
GTLREF
RCOMP
RODT
VIH
1.00
—
1.05
2/3 VCCP
27.5
55
1.10
—
V
V
Ω
Ω
V
V
V
GTL Reference Voltage
Compensation Resistor
Termination Resistor
Input High Voltage
Input Low Voltage
6
27.23
27.78
10
11
3,6
2,4
6
—
—
GTLREF+0.10
-0.10
VCCP
VCCP+0.10
GTLREF–0.10
VCCP
VIL
0
VOH
Output High Voltage
VCCP–0.10
VCCP
46 [SS]
46 [CC]
61 [SS]
64 [CC]
RTT
Termination Resistance
GTL Buffer on Resistance
55
25
Ω
Ω
7, 12
5
RON (GTL
mode)
21
29
ILI
Input Leakage Current
Pad Capacitance
—
—
±100
2.75
µA
pF
8
9
Cpad
1.8
2.1
NOTES:
1.
2.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
IL is defined as the maximum voltage level at a receiving agent that will be interpreted as a logical low
V
value.
3.
4.
VIH is defined as the minimum voltage level at a receiving agent that will be interpreted as a logical high
value.
VIH and VOH may experience excursions above VCCP. However, input signal drivers must comply with the
signal quality specifications.
5.
6.
7.
8.
This is the pull-down driver resistance.
GTLREF should be generated from VCCP with a 1% tolerance resistor divider.
RTT is the on-die termination resistance measured at VOL of the AGTL+ output driver.
Specified with on-die RTT and RON are turned off.
9.
Cpad includes die capacitance only. No package parasitics are included.
There are external resistor on the comp0 and comp2 pins.
10.
11.
12.
On-die termination resistance, measured at 0.33*VCCP
.
SS: source synchronous pins such as quad-pumped data bus and double-pumped address bus which
require a clock strobe. CC: Common clock pins.
30
Datasheet
INTEL [ INTEL ]
