LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Table 55. Interrupt Status Register (Address 19, Hex 13)
Bit
Name
Reserved
Description
Type 1
Default
19.15:9
Ignore
Ignore
RO
N/A
0
19.8
Reserved
RO
Auto-negotiation Status
19.7
ANDONE
RO/SC
N/A
0
1= Auto-negotiation has completed.
0= Auto-negotiation has not completed.
Speed Change Status
1 = A Speed Change has occurred since last reading
19.6
19.5
19.4
SPEEDCHG
DUPLEXCHG
LINKCHG
this register.
RO/SC
RO/SC
RO/SC
0 = A Speed Change has not occurred since last
reading this register.
Duplex Change Status
1 = A Duplex Change has occurred since last
reading this register.
0
0 = A Duplex Change has not occurred since last
reading this register.
Link Status Change Status
1 = A Link Change has occurred since last reading
this register.
0
0
0 = A Link Change has not occurred since last
reading this register.
19.3
19.2
Reserved
MDINT
Ignore.
RO
RO
1 = MII interrupt pending.
0 = No MII interrupt pending.
19.1
19.0
Reserved
Reserved
Ignore.
Ignore
RO
RO
N/A
0
1. R/W = Read/Write, RO = Read Only, SC = Self Clearing.
84
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
INTEL [ INTEL ]
