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LXT971ALC 参数 Datasheet PDF下载

LXT971ALC图片预览
型号: LXT971ALC
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V双速快速以太网PHY收发器 [3.3V Dual-Speed Fast Ethernet PHY Transceiver]
分类和应用: 网络接口电信集成电路电信电路以太网以太网:16GBASE-T
文件页数/大小: 90 页 / 651 K
品牌: INTEL [ INTEL ]
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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver  
3.7.2  
Collision Indication  
Figure 18 shows normal transmission. Upon detection of a collision, the COL output is asserted  
and remains asserted for the duration of the collision as shown in Figure 19.  
Figure 18. 100BASE-TX Transmission with No Errors  
TX_CLK  
TX_EN  
TXD<3:0>  
CRS  
P
R
E
A
M
B
L
E
DA DA DA DA DA DA DA DA DA  
COL  
Figure 19. 100BASE-TX Transmission with Collision  
TX_CLK  
TX_EN  
TXD<3:0>  
CRS  
P
R
E
A
M
B
L
E
JAM  
JAM  
JAM  
JAM  
COL  
3.7.3  
100BASE-X Protocol Sublayer Operations  
With respect to the 7-layer communications model, the LXT971A is a Physical Layer 1 (PHY)  
device. The LXT971A implements the Physical Coding Sublayer (PCS), Physical Medium  
Attachment (PMA), and Physical Medium Dependent (PMD) sublayers of the reference model  
defined by the IEEE 802.3u standard. The following paragraphs discuss LXT971A operation from  
the reference model point of view.  
3.7.3.1  
PCS Sublayer  
The Physical Coding Sublayer (PCS) provides the MII interface, as well as the 4B/5B encoding/  
decoding function.  
For 100BASE-TX and 100FX operation, the PCS layer provides IDLE symbols to the PMD-layer  
line driver as long as TX_EN is de-asserted.  
3.7.3.1.1 Preamble Handling  
When the MAC asserts TX_EN, the PCS substitutes a /J/K symbol pair, also known as the Start-of-  
Stream Delimiter (SSD), for the first two nibbles received across the MII. The PCS layer continues  
to encode the remaining MII data, following the coding in Table 11, until TX_EN is de-asserted. It  
then returns to supplying IDLE symbols to the line driver.  
38  
Datasheet  
Document #: 249414  
Revision #: 002  
Rev. Date: August 7, 2002  
 
 
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