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LXT971ALC 参数 Datasheet PDF下载

LXT971ALC图片预览
型号: LXT971ALC
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V双速快速以太网PHY收发器 [3.3V Dual-Speed Fast Ethernet PHY Transceiver]
分类和应用: 网络接口电信集成电路电信电路以太网以太网:16GBASE-T
文件页数/大小: 90 页 / 651 K
品牌: INTEL [ INTEL ]
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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver  
De-assertion time for CRS is slightly longer than assertion time. This causes IFG intervals to  
appear somewhat shorter to the MAC than it actually is on the wire.  
CRS de-assertion is not aligned with TX_EN de-assertion on transmit loopbacks in half-  
duplex mode.  
3.7.3.2.4 Receive Data Valid  
The LXT971A asserts RX_DV to indicate that the received data maps to valid symbols. However,  
RXD outputs zeros until the received data is decoded and available for transfer to the controller.  
3.7.3.3  
Twisted-Pair PMD Sublayer  
The twisted-pair Physical Medium Dependent (PMD) layer provides the signal scrambling and de-  
scrambling, line coding and decoding (MLT-3 for 100BASE-TX, Manchester for 10BASE-T), as  
well as receiving, polarity correction, and baseline wander correction functions.  
Scrambler/De-scrambler  
The purpose of the scrambler is to spread the signal power spectrum and further reduce EMI using  
an 11-bit, data-independent polynomial. The receiver automatically decodes the polynomial  
whenever IDLE symbols are received.  
Scrambler Seeding  
Once the transmit data (or Idle symbols) are properly encoded, they are scrambled to further reduce  
EMI and to spread the power spectrum using an 11-bit scrambler seed. Five seed bits are  
determined by the PHY address, and the remaining bits are hard coded in the design.  
Scrambler Bypass  
The scrambler/de-scrambler can be bypassed by setting Register bit 16.12 = 1. The scrambler is  
automatically bypassed when the fiber port is enabled. Scrambler bypass is provided for diagnostic  
and test support.  
3.7.3.3.1 Baseline Wander Correction  
The LXT971A provides a baseline wander correction function which makes the device robust  
under all network operating conditions. The MLT3 coding scheme used in 100BASE-TX is by  
definition “unbalanced”. This means that the average value of the signal voltage can “wander”  
significantly over short time intervals (tenths of seconds). This wander can cause receiver errors at  
long-line lengths (100 meters) in less robust designs. Exact characteristics of the wander are  
completely data dependent.  
The LXT971A baseline wander correction characteristics allow the device to recover error-free  
data while receiving worst-case “killer” packets over all cable lengths.  
3.7.3.3.2 Polarity Correction  
The 100BASE-TX de-scrambler automatically detects and corrects for the condition where the  
receive signal at TPFIP and TPFIN is inverted.  
42  
Datasheet  
Document #: 249414  
Revision #: 002  
Rev. Date: August 7, 2002  
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