LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver
Table 10. Carrier Sense, Loopback, and Collision Conditions
Test1
Operational
Loopback
Speed
Duplex Condition
Carrier Sense
Collision
Loopback
Full-Duplex
Half-Duplex
Full-Duplex
Half-Duplex,
Receive Only
Yes
No
No
No
No
None
100 Mbps
Transmit or Receive
Receive Only
Transmit and Receive
None
Yes
Transmit or Receive
Transmit or Receive
Yes
No
Yes
No
Transmit and Receive
Transmit and Receive
10 Mbps Register bit 16.8 = 0
Half-Duplex,
Register bit 16.8 = 1
1. Test Loopback is enabled when 0.14 = 1
3.7
100 Mbps Operation
3.7.1
100BASE-X Network Operations
During 100BASE-X operation, the LXT971A transmits and receives 5-bit symbols across the
network link. Figure 14 shows the structure of a standard frame packet. When the MAC is not
actively transmitting data, the LXT971A sends out Idle symbols on the line.
In 100BASE-TX mode, the LXT971A scrambles and transmits the data to the network using MLT-
3 line code (Figure 15 on page 37). MLT-3 signals received from the network are de-scrambled,
decoded, and sent across the MII to the MAC.
In 100BASE-FX mode, the LXT971A transmits and receives NRZI signals across the LVPECL
interface. An external 100FX transceiver module is required to complete the fiber connection. To
enable 100BASE-FX operation, auto-negotiation must be disabled and FX selected.
Figure 14. 100BASE-X Frame Format
64-Bit Preamble
Destination and Source
Address (6 Octets each)
Packet Length
(2 Octets)
Data Field
Frame Check Field InterFrame Gap / Idle Code
(8 Octets)
(Pad to minimum packet size)
(4 Octets)
(> 12 Octets)
CRC
IFG
SFD
P0 P1 P6
DA DA SA SA L1
L2
D0 D1 Dn
I0
Replaced by
Replaced by
Start-of-Frame
Delimiter (SFD)
/T/R/ code-groups
/J/K/ code-groups
Start-of-Stream
Delimiter (SSD)
End-of-Stream Delimiter (ESD)
36
Datasheet
Document #: 249414
Revision #: 002
Rev. Date: August 7, 2002
INTEL [ INTEL ]
