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LXT971ALC 参数 Datasheet PDF下载

LXT971ALC图片预览
型号: LXT971ALC
PDF下载: 下载PDF文件 查看货源
内容描述: 3.3V双速快速以太网PHY收发器 [3.3V Dual-Speed Fast Ethernet PHY Transceiver]
分类和应用: 网络接口电信集成电路电信电路以太网以太网:16GBASE-T
文件页数/大小: 90 页 / 651 K
品牌: INTEL [ INTEL ]
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LXT971A 3.3V Dual-Speed Fast Ethernet Transceiver  
3.4.2  
Hardware Control Mode  
In the Hardware Control Mode, LXT971A disables direct write operations to the MDIO registers  
via the MDIO Interface. On power-up or hardware reset the LXT971A reads the Hardware Control  
Interface pins and sets the MDIO registers accordingly.  
The following modes are available using either Hardware Control or MDIO Control:  
Force network link to 100FX (Fiber).  
Force network link operation to:  
— 100BASE-TX, Full-Duplex.  
— 100BASE-TX, Half-Duplex.  
— 10BASE-T, Full-Duplex.  
— 10BASE-T, Half-Duplex.  
Allow auto-negotiation/parallel-detection.  
When the network link is forced to a specific configuration, the LXT971A immediately begins  
operating the network interface as commanded. When auto-negotiation is enabled, the LXT971A  
begins the auto-negotiation/parallel-detection operation.  
Datasheet  
27  
Document #: 249414  
Revision #: 002  
Rev. Date: August 7, 2002  
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