1-Gbit P30 Family
5.
The Clear Status command only clears the error bits in the status register if the device is not in the following modes: WSM
running (Pgm Busy, Erase Busy, Pgm Busy In Erase Suspend, OTP Busy, BEFP modes).
BEFP writes are only allowed when the status register bit #0 = 0, or else the data is ignored.
The "current state" is that of the "chip" and not of the "partition"; Each partition "remembers" which output (Array, ID/CFI or
Status) it was last pointed to on the last instruction to the "chip", but the next state of the chip does not depend on where
the partition's output mux is presently pointing to.
6.
7.
8.
9.
Confirm commands (Lock Block, Unlock Block, Lock-Down Block, Configuration Register) perform the operation and then
move to the Ready State.
WA0 refers to the block address latched during the first write cycle of the current operation.
April 2005
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Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
Datasheet
INTEL [ INTEL ]
