MAX II Architecture
Figure 2–20. Row I/O Block Connection to the Interconnect
Note (1)
R4 Interconnects
C4 Interconnects
I/O Block Local
Interconnect
data_out
[6..0]
7
OE
[6..0]
7
LAB
Row
I/O Block
fast_out
[6..0]
7
7
data_in[6..0]
Direct Link
Interconnect
from Adjacent LAB
Direct Link
Interconnect
Row I/O Block
Contains up to
Seven IOEs
to Adjacent LAB
LAB Column
clock [3..0]
LAB Local
Interconnect
Note to Figure 2–20:
(1) Each of the seven IOEs in the row I/O block can have one data_outor fast_outoutput, one OEoutput, and one
data_ininput.
Altera Corporation
August 2006
Core Version a.b.c variable
2–31
MAX II Device Handbook, Volume 1
INTEL [ INTEL ]
