MAX II Architecture
Figure 2–17. EPM570, EPM1270 & EPM2210 UFM Block LAB Row Interface
CFM Block
RTP_BUSY
BUSY
OSC
DRDout
DRDin
LAB
DRDCLK
DRDSHFT
ARDin
PROGRAM
ERASE
OSC_ENA
ARCLK
ARSHFT
LAB
UFM Block
LAB
TM
The MAX II architecture supports the MultiVolt core feature, which
allows MAX II devices to support multiple VCC levels on the VCCINT
supply. An internal linear voltage regulator provides the necessary 1.8-V
internal voltage supply to the device. The voltage regulator supports
3.3-V or 2.5-V supplies on its inputs to supply the 1.8-V internal voltage
to the device, as shown in Figure 2–18. The voltage regulator is not
guaranteed for voltages that are between the maximum recommended
2.5-V operating voltage and the minimum recommended 3.3-V operating
voltage.
MultiVolt Core
For external 1.8-V supplies, MAX IIG devices are required. The voltage
regulator on these devices is bypassed to support the 1.8-V VCC external
supply path to the 1.8-V internal supply.
Altera Corporation
August 2006
Core Version a.b.c variable
2–27
MAX II Device Handbook, Volume 1
INTEL [ INTEL ]
